[llvm] [AArch64] Initial sched model for Neoverse V3, V3AE (PR #163932)

[Simon Wallis via llvm-commits]

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@@ -1295,9 +1295,9 @@ def : ProcessorModel<"neoverse-v1", NeoverseV1Model,
                      ProcessorFeatures.NeoverseV1, [TuneNeoverseV1]>;
 def : ProcessorModel<"neoverse-v2", NeoverseV2Model,
                      ProcessorFeatures.NeoverseV2, [TuneNeoverseV2]>;
-def : ProcessorModel<"neoverse-v3", NeoverseV2Model,
+def : ProcessorModel<"neoverse-v3", NeoverseV3Model,
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simonwallis2 wrote:

OK I have reused this model for those 3 cores. 
I see a reasonable match between V3 and the pipeline described in the Cortex-X4 SWOG. 
Cortex-X925 has more differences and could perhaps benefit from its own model.

https://github.com/llvm/llvm-project/pull/163932