[llvm] [ShrinkWrap] Consider constant pool access as non-stack access (PR #164393)
Sushant Gokhale via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 21 03:46:33 PDT 2025
https://github.com/sushgokh created https://github.com/llvm/llvm-project/pull/164393
As far as I understand, constant pool access does not access stack and accesses read-only memory.
This patch considers constant pool access as non-stack access allowing shrink wrapping to happen in the concerned test.
We should be seeing perf improvement with povray benchmark from SPEC17(around 12% with -flto -Ofast) after this patch.
An NFC PR #162476 already exists to upload the test before the patch but approval has got delayed. So, as @davemgreen suggested in that PR, I have uploaded the test and patch in this single PR to show how test looks like.
>From b440b4a5838aae95b767a6766e8df4f915e9230a Mon Sep 17 00:00:00 2001
From: sgokhale <sgokhale at nvidia.com>
Date: Tue, 21 Oct 2025 02:52:38 -0700
Subject: [PATCH 1/2] [ShrinkWrap][NFC] Test with load from constant pool
preventing shrink wrapping
A future patch intends improve the situation to allow shrink wrapping happen.
---
.../AArch64/shrink-wrap-const-pool-access.mir | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir
diff --git a/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir b/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir
new file mode 100644
index 0000000000000..b364d4723b83f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir
@@ -0,0 +1,73 @@
+# RUN: llc -simplify-mir -run-pass=shrink-wrap -o - %s | FileCheck %s
+--- |
+ declare double @foo()
+
+ define double @shrink_wrap_load_from_const_pool(double %q) {
+ entry:
+ %0 = fcmp oeq double %q, 3.125500e+02
+ br i1 %0, label %common.ret, label %if.else
+
+ common.ret: ; preds = %if.else, %entry, %exit1
+ %common.ret.op = phi double [ %3, %exit1 ], [ 0.000000e+00, %entry ], [ 0.000000e+00, %if.else ]
+ ret double %common.ret.op
+
+ if.else: ; preds = %entry
+ %1 = call double @foo()
+ %2 = fcmp oeq double %1, 0.000000e+00
+ br i1 %2, label %exit1, label %common.ret
+
+ exit1: ; preds = %if.else
+ %3 = call double @foo()
+ br label %common.ret
+ }
+...
+# FIXME: Following code has a load from constant pool. Accessing constant pool
+# must not be considered as a stack access and hence, shrink wrapping must
+# happen.
+# CHECK-NOT: savePoint
+# CHECK-NOT: restorePoint
+---
+name: shrink_wrap_load_from_const_pool
+tracksRegLiveness: true
+constants:
+ - id: 0
+ value: 'double 3.125500e+02'
+ alignment: 8
+body: |
+ bb.0.entry:
+ successors: %bb.4(0x50000000), %bb.2(0x30000000)
+ liveins: $d0
+
+ renamable $d1 = COPY $d0
+ renamable $x8 = ADRP target-flags(aarch64-page) %const.0
+ renamable $d2 = LDRDui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s64) from constant-pool)
+ renamable $d0 = FMOVD0
+ nofpexcept FCMPDrr killed renamable $d1, killed renamable $d2, implicit-def $nzcv, implicit $fpcr
+ Bcc 1, %bb.2, implicit killed $nzcv
+
+ bb.4:
+ liveins: $d0
+
+ bb.1.common.ret:
+ liveins: $d0
+
+ RET_ReallyLR implicit $d0
+
+ bb.2.if.else:
+ successors: %bb.3(0x50000000), %bb.1(0x30000000)
+
+ ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+ BL @foo, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $d0
+ ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+ renamable $d1 = COPY $d0
+ renamable $d0 = FMOVD0
+ nofpexcept FCMPDri killed renamable $d1, implicit-def $nzcv, implicit $fpcr
+ Bcc 1, %bb.1, implicit killed $nzcv
+ B %bb.3
+
+ bb.3.exit1:
+ ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+ BL @foo, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $d0
+ ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+ B %bb.1
+...
>From 2ae166151316c2ad83123c27184cd19ce6e7e48b Mon Sep 17 00:00:00 2001
From: sgokhale <sgokhale at nvidia.com>
Date: Tue, 21 Oct 2025 03:30:14 -0700
Subject: [PATCH 2/2] [ShrinkWrap] Consider constant pool access as non-stack
access
As far as I understand, constant pool access does not access stack and
accesses read-only memory.
This patch considers constant pool access as non-stack access allowing
shrink wrapping to happen in the concerned test.
We should be seeing perf improvement with povray benchmark from SPEC17(around 12% with -flto
-Ofast) after this patch.
---
llvm/lib/CodeGen/ShrinkWrap.cpp | 2 +-
.../CodeGen/AArch64/shrink-wrap-const-pool-access.mir | 8 +++++---
llvm/test/CodeGen/X86/fp128-select.ll | 6 +++---
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp
index 826e4126de44c..83581052560cb 100644
--- a/llvm/lib/CodeGen/ShrinkWrap.cpp
+++ b/llvm/lib/CodeGen/ShrinkWrap.cpp
@@ -319,7 +319,7 @@ bool ShrinkWrapImpl::useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
return isa<GlobalValue>(UO);
}
if (const PseudoSourceValue *PSV = Op->getPseudoValue())
- return PSV->isJumpTable();
+ return PSV->isJumpTable() || PSV->isConstantPool();
return false;
};
// Load/store operations may access the stack indirectly when we previously
diff --git a/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir b/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir
index b364d4723b83f..581e8b3f299ee 100644
--- a/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir
+++ b/llvm/test/CodeGen/AArch64/shrink-wrap-const-pool-access.mir
@@ -21,11 +21,13 @@
br label %common.ret
}
...
-# FIXME: Following code has a load from constant pool. Accessing constant pool
+# Following code has a load from constant pool. Accessing constant pool
# must not be considered as a stack access and hence, shrink wrapping must
# happen.
-# CHECK-NOT: savePoint
-# CHECK-NOT: restorePoint
+# CHECK: savePoint:
+# CHECK: - point: '%bb.3'
+# CHECK: restorePoint:
+# CHECK: - point: '%bb.5'
---
name: shrink_wrap_load_from_const_pool
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/X86/fp128-select.ll b/llvm/test/CodeGen/X86/fp128-select.ll
index 659e4ddedc646..27a651e23f886 100644
--- a/llvm/test/CodeGen/X86/fp128-select.ll
+++ b/llvm/test/CodeGen/X86/fp128-select.ll
@@ -13,8 +13,8 @@ define void @test_select(ptr %p, ptr %q, i1 zeroext %c) nounwind {
; SSE: # %bb.0:
; SSE-NEXT: testl %edx, %edx
; SSE-NEXT: jne .LBB0_1
-; SSE-NEXT: # %bb.3:
-; SSE-NEXT: movaps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE-NEXT: # %bb.2:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [NaN]
; SSE-NEXT: movaps %xmm0, (%rsi)
; SSE-NEXT: retq
; SSE-NEXT: .LBB0_1:
@@ -58,7 +58,7 @@ define fp128 @test_select_cc(fp128, fp128) nounwind {
; SSE-NEXT: xorps %xmm1, %xmm1
; SSE-NEXT: jmp .LBB1_3
; SSE-NEXT: .LBB1_1:
-; SSE-NEXT: movaps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0]
; SSE-NEXT: .LBB1_3: # %BB0
; SSE-NEXT: testl %ebx, %ebx
; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
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