[llvm] [RISCV] Remove remapping Zfinx register classes to GPR class in getRegForInlineAsmConstraint. (PR #164352)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 20 21:35:52 PDT 2025

Previous message: [llvm] [msan][test] Add another target("aarch64.svcount") test case (PR #164343)
Next message: [llvm] [RISCV] Remove remapping Zfinx register classes to GPR class in getRegForInlineAsmConstraint. (PR #164352)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/topperc approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/164352

Previous message: [llvm] [msan][test] Add another target("aarch64.svcount") test case (PR #164343)
Next message: [llvm] [RISCV] Remove remapping Zfinx register classes to GPR class in getRegForInlineAsmConstraint. (PR #164352)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list