[llvm] [AMDGPU] Add regbankselect rules for G_ADD/SUB and variants (PR #159860)

[Petar Avramovic via llvm-commits]

================
@@ -477,6 +477,30 @@ bool AMDGPURegBankLegalize::runOnMachineFunction(MachineFunction &MF) {
       }
       if (MI.getOpcode() == AMDGPU::G_ANYEXT) {
         Combiner.tryCombineS1AnyExt(MI);
+        // Also handle anyext where src and dst have same type (nop anyext)
+        if (!MI.getParent())
+          continue; // Already erased by tryCombineS1AnyExt
+        Register Dst = MI.getOperand(0).getReg();
+        Register Src = MI.getOperand(1).getReg();
+        if (MRI.getType(Dst) == MRI.getType(Src)) {
+          while (!MRI.use_empty(Dst)) {
+            auto &Use = *MRI.use_begin(Dst);
+            Use.setReg(Src);
+          }
+          MI.eraseFromParent();
+        }
+        continue;
+      }
+      // Handle G_TRUNC that produces sgpr S1 - convert to sgpr S32
+      // Only eliminate if dead (no uses), otherwise legalization will handle it
+      if (MI.getOpcode() == AMDGPU::G_TRUNC) {
+        Register Dst = MI.getOperand(0).getReg();
+        if (MRI.getType(Dst) == LLT::scalar(1) && MRI.getRegBankOrNull(Dst) &&
+            MRI.getRegBankOrNull(Dst)->getID() == AMDGPU::SGPRRegBankID &&
+            MRI.use_empty(Dst)) {
+          // Dead sgpr S1 trunc, just erase it
+          MI.eraseFromParent();
+        }
----------------
petar-avramovic wrote:

Suggested change in another place:
```
AMDGPURegBankLegalizeHelper.cpp
     // sgpr trunc
     case Sgpr32Trunc: {
       assert(Ty.getSizeInBits() < 32);
       assert(RB == SgprRB);
       Register NewDst = MRI.createVirtualRegister(SgprRB_S32);
       Op.setReg(NewDst);
-      B.buildTrunc(Reg, NewDst);
+      if (!MRI.use_empty(Reg)) {
+        B.buildTrunc(Reg, NewDst);
+      }
       break;
     }
```

https://github.com/llvm/llvm-project/pull/159860