[llvm] [AMDGPU] Reland "Remove redundant s_cmp_lg_* sX, 0" (PR #164201)

[Jay Foad via llvm-commits]

jayfoad wrote:

> Reland PR #162352. Fix by excluding SI_PC_ADD_REL_OFFSET from instructions that set SCC = DST!=0. Passes check-libc-amdgcn-amd-amdhsa now.

I am concerned that there may be more problems lurking here. From searching the output of tablegen I see all these instructions that define SCC but do not directly correspond to a real SALU instruction. I think setsSCCifResultIsNonZero will return true for almost all of them, which seems wrong.

ADJCALLSTACKDOWN
ADJCALLSTACKUP
ENTER_STRICT_WQM
ENTER_STRICT_WWM
GET_SHADERCYCLESHILO
SI_DEMOTE_I1
SI_ELSE
SI_END_CF
SI_IF
SI_IF_BREAK
SI_INDIRECT_DST_V1
SI_INDIRECT_DST_V10
SI_INDIRECT_DST_V11
SI_INDIRECT_DST_V12
SI_INDIRECT_DST_V16
SI_INDIRECT_DST_V2
SI_INDIRECT_DST_V32
SI_INDIRECT_DST_V4
SI_INDIRECT_DST_V8
SI_INDIRECT_DST_V9
SI_INDIRECT_SRC_V1
SI_INDIRECT_SRC_V10
SI_INDIRECT_SRC_V11
SI_INDIRECT_SRC_V12
SI_INDIRECT_SRC_V16
SI_INDIRECT_SRC_V2
SI_INDIRECT_SRC_V32
SI_INDIRECT_SRC_V4
SI_INDIRECT_SRC_V8
SI_INDIRECT_SRC_V9
SI_KILL_I1_PSEUDO
SI_KILL_I1_TERMINATOR
SI_LOOP
SI_PC_ADD_REL_OFFSET

https://github.com/llvm/llvm-project/pull/164201