[llvm] [AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc and fpext (PR #163398)

[Ryan Cowan via llvm-commits]

HolyMolyCowMan wrote:

For the `fptrunc` case would emitting the current set of instructions using a `.lowerIf` based on `<n x fp64> -> <n x fp16>` be better? Non vector fp64 -> fp16 can be done via a single round so wouldn't need the lowering. Or do you think we need a new opcode and lowering for that opcode?

https://github.com/llvm/llvm-project/pull/163398