[llvm] [WebAssembly] Add pattern for relaxed laneselect (from bitselect simd) (PR #163807)

[Derek Schuff via llvm-commits]

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@@ -1662,6 +1662,13 @@ multiclass SIMDLANESELECT<Vec vec, bits<32> op> {
                 (vec.vt V128:$a), (vec.vt V128:$b), (vec.vt V128:$c)))],
               vec.prefix#".relaxed_laneselect\t$dst, $a, $b, $c",
               vec.prefix#".relaxed_laneselect", op>;
+
+  let AddedComplexity = 1 in {
+    def : Pat<(vec.vt (int_wasm_bitselect
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dschuff wrote:

What I think Sam means is that there should probably be a separate intrinsic for relaxed laneselect rather than selecting the bitselect intrinsic to laneselect. (At least, that's what my feedback would be :)
The reason is that our current convention is that the @llvm.wasm.foo intrinsics each correspond directly to a particular wasm instruction, so if a user generates bitselect intrinsic, they probably want its particular semantics. Or put another way, the semantics of the existing @llvm.wasm.bitselect intrinsic currently correspond to the bitselect instruction which has more strict semantics than the relaxed laneselect instruction; so implementing the intrinsic with the laneselect instruction would be incorrect.

The conventions of the intrinsics in the @llvm.wasm space are something that could in principle be changed, but I don't think we'd want to do that in this case.

https://github.com/llvm/llvm-project/pull/163807