[llvm] [AArch64] Convert `CSEL(X, 1)` into `CSINC(X, XZR)` in early-ifcvt (PR #162993)

[Csanád Hajdú via llvm-commits]

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@@ -5,10 +5,9 @@ define void @peephole_csel(ptr %dst, i1 %0, i1 %cmp) {
 ; CHECK-LABEL: peephole_csel:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    tst w2, #0x1
-; CHECK-NEXT:    mov w8, #1 // =0x1
-; CHECK-NEXT:    mov x9, xzr
+; CHECK-NEXT:    mov x8, xzr
 ; CHECK-NEXT:    tst w1, #0x1
-; CHECK-NEXT:    csel x8, x8, x9, eq
+; CHECK-NEXT:    csinc x8, x8, xzr, ne
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Il-Capitano wrote:

I'm pretty sure `x8` isn't folded into the `csinc` because the MI peephole optimizer emits an `ORRXrs $xzr %reg` instead of a `COPY %reg` here: https://godbolt.org/z/z3sdPrv59

If it used a `COPY` instead I think the register coalescer would fold `COPY $xzr` into the `csinc`, turning into a `cset`.

https://github.com/llvm/llvm-project/pull/162993