[llvm] [PowerPC] Replace vspltisw+vadduwm instructions with xxleqv+vsubuwm for adding the vector {1, 1, 1, 1} (PR #160882)
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llvm-commits at lists.llvm.org
Thu Oct 16 22:47:55 PDT 2025
Himadhith wrote:
This patch does not handle `v1i128` vector type because it does not emit the instruction `vspltisw`.
```
# %bb.0: # %entry
addis 3, 2, .LCPI4_0 at toc@ha
addi 3, 3, .LCPI4_0 at toc@l
lxvd2x 0, 0, 3
xxswapd 35, 0
vadduqm 2, 2, 3
blr
.long 0
.quad 0
```
https://github.com/llvm/llvm-project/pull/160882
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