[llvm] [PowerPC] Replace vspltisw+vadduwm instructions with xxleqv+vsubuwm for adding the vector {1, 1, 1, 1} (PR #160882)
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llvm-commits at lists.llvm.org
Thu Oct 16 22:30:07 PDT 2025
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@@ -19208,13 +19208,54 @@ static SDValue combineADDToMAT_PCREL_ADDR(SDNode *N, SelectionDAG &DAG,
return MatPCRel;
}
+static SDValue combineADDToSUB(SDNode *N, SelectionDAG &DAG,
+ const PPCSubtarget &Subtarget) {
+ EVT VT = N->getValueType(0);
+
+ // Handle v2i64, v4i32, v8i16 and v16i8 types
+ if (!(VT == MVT::v8i16 || VT == MVT::v16i8 || VT == MVT::v4i32 ||
+ VT == MVT::v2i64))
+ return SDValue();
+
+ SDValue LHS = N->getOperand(0);
+ SDValue RHS = N->getOperand(1);
+
+ // Check if RHS is BUILD_VECTOR
+ // To satisfy commutative property a+b = b+a
+ if (RHS.getOpcode() != ISD::BUILD_VECTOR)
+ std::swap(LHS, RHS);
----------------
Himadhith wrote:
Done.
https://github.com/llvm/llvm-project/pull/160882
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