[llvm] [AMDGPU] 32-bit ABS is a legal DAG node (PR #163907)

[via llvm-commits]

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@@ -14945,6 +14945,13 @@ SDValue SITargetLowering::performMinMaxCombine(SDNode *N,
     }
   }
 
+  // max(x, neg(x)) -> abs(x)
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LU-JOHN wrote:

> Can we do this in the generic part?

All ISD::SMAX nodes are sent to this function from the switch in PerformDAGCombine.  I don't see where else to put it.  This function is intended to process min or max nodes so it makes sense to put it here.

https://github.com/llvm/llvm-project/pull/163907