[llvm] [AMDGPU] NFC: Add Opcode variants for TII->isMFMA* (PR #163874)

Jeffrey Byrnes via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 16 14:56:00 PDT 2025


https://github.com/jrbyrnes created https://github.com/llvm/llvm-project/pull/163874

Adds a couple missing variants based on opcode.

>From 2d7eba2d3fa136bdc3532c9c4a1687d23e849b27 Mon Sep 17 00:00:00 2001
From: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Date: Thu, 16 Oct 2025 14:52:53 -0700
Subject: [PATCH] [AMDGPU] NFC: Add Opcode variants for TII->isMFMA*

Change-Id: I099e33567ebef8f2da5208e506735ba82a2fd195
---
 llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index e979eeb0bdf3a..df27ec1f8de8c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -879,6 +879,11 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
            MI.getOpcode() != AMDGPU::V_ACCVGPR_READ_B32_e64;
   }
 
+  bool isMFMA(uint16_t Opcode) const {
+    return isMAI(Opcode) && Opcode != AMDGPU::V_ACCVGPR_WRITE_B32_e64 &&
+           Opcode != AMDGPU::V_ACCVGPR_READ_B32_e64;
+  }
+
   static bool isDOT(const MachineInstr &MI) {
     return MI.getDesc().TSFlags & SIInstrFlags::IsDOT;
   }
@@ -895,6 +900,10 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
     return isMFMA(MI) || isWMMA(MI) || isSWMMAC(MI);
   }
 
+  bool isMFMAorWMMA(uint16_t Opcode) const {
+    return isMFMA(Opcode) || isWMMA(Opcode) || isSWMMAC(Opcode);
+  }
+
   static bool isSWMMAC(const MachineInstr &MI) {
     return MI.getDesc().TSFlags & SIInstrFlags::IsSWMMAC;
   }



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