[llvm] Hexagon QFP Optimizer (PR #163843)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/Hexagon/HexagonQFPoptimizer.cpp llvm/lib/Target/Hexagon/Hexagon.h llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp --diff_from_common_commit
``````````

:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/Hexagon/HexagonQFPoptimizer.cpp b/llvm/lib/Target/Hexagon/HexagonQFPoptimizer.cpp
index 9c4c4cf36..60c02bd57 100644
--- a/llvm/lib/Target/Hexagon/HexagonQFPoptimizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonQFPoptimizer.cpp
@@ -84,8 +84,7 @@ using namespace llvm;
 
 cl::opt<bool>
     DisableQFOptimizer("disable-qfp-opt", cl::init(false),
-     cl::desc(
-   "Disable optimization of Qfloat operations."));
+                       cl::desc("Disable optimization of Qfloat operations."));
 
 std::vector<unsigned short> QFPInst = {
     Hexagon::V6_vadd_hf,          Hexagon::V6_vadd_qf16,
@@ -173,8 +172,8 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
   MachineOperand &Res = MI->getOperand(0);
   MachineInstr *Inst1 = nullptr;
   MachineInstr *Inst2 = nullptr;
-  LLVM_DEBUG(dbgs() << "\n[Reaching Defs of operands]: ";
-    DefMI1->dump(); DefMI2->dump());
+  LLVM_DEBUG(dbgs() << "\n[Reaching Defs of operands]: "; DefMI1->dump();
+             DefMI2->dump());
 
   // Get the reaching defs of DefMI
   if (DefMI1->getNumOperands() > 1 && DefMI1->getOperand(1).isReg() &&
@@ -197,9 +196,9 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
 
     // If the reaching defs of DefMI are W register type, we return
     if ((Inst1 && MRI->getRegClass(Inst1->getOperand(0).getReg()) ==
-            &Hexagon::HvxWRRegClass) || (Inst2 &&
-        MRI->getRegClass(Inst2->getOperand(0).getReg()) ==
-            &Hexagon::HvxWRRegClass))
+                      &Hexagon::HvxWRRegClass) ||
+        (Inst2 && MRI->getRegClass(Inst2->getOperand(0).getReg()) ==
+                      &Hexagon::HvxWRRegClass))
       return false;
 
     // Analyze the use operands of the conversion to get their KILL status
@@ -215,14 +214,13 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
     if (MI->getOpcode() != Hexagon::V6_vmpy_qf32_sf)
       InstTy = QFPInstMap[QFPInstMap[MI->getOpcode()]];
 
-    MIB = BuildMI(*MBB, MI, MI->getDebugLoc(),
-        HII->get(InstTy), Res.getReg())
-        .addReg(Src1.getReg(), Op0F, Src1.getSubReg())
-        .addReg(Src2.getReg(), Op1F, Src2.getSubReg());
+    MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), HII->get(InstTy), Res.getReg())
+              .addReg(Src1.getReg(), Op0F, Src1.getSubReg())
+              .addReg(Src2.getReg(), Op1F, Src2.getSubReg());
     LLVM_DEBUG(dbgs() << "\n[Inserting]: "; MIB.getInstr()->dump());
     return true;
 
-  // Check if left operand's reaching def is a conversion to sf/hf
+    // Check if left operand's reaching def is a conversion to sf/hf
   } else if (((Def1OP == Hexagon::V6_vconv_sf_qf32 &&
                Def2OP != Hexagon::V6_vconv_sf_qf32) ||
               (Def1OP == Hexagon::V6_vconv_hf_qf16 &&
@@ -231,7 +229,7 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
              (MI->getOpcode() != Hexagon::V6_vmpy_qf32_sf)) {
 
     if (Inst1 && MRI->getRegClass(Inst1->getOperand(0).getReg()) ==
-        &Hexagon::HvxWRRegClass)
+                     &Hexagon::HvxWRRegClass)
       return false;
 
     MachineOperand &Src1 = DefMI1->getOperand(1);
@@ -241,12 +239,12 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
     Src1.setIsKill(false);
     Op1F = getKillRegState(Src2.isKill());
     MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), HII->get(InstTy), Res.getReg())
-        .addReg(Src1.getReg(), Op0F, Src1.getSubReg())
-        .addReg(Src2.getReg(), Op1F, Src2.getSubReg());
+              .addReg(Src1.getReg(), Op0F, Src1.getSubReg())
+              .addReg(Src2.getReg(), Op1F, Src2.getSubReg());
     LLVM_DEBUG(dbgs() << "\n[Inserting]: "; MIB.getInstr()->dump());
     return true;
 
-  // Check if right operand's reaching def is a conversion tp sf/hf
+    // Check if right operand's reaching def is a conversion tp sf/hf
   } else if (((Def1OP != Hexagon::V6_vconv_sf_qf32 &&
                Def2OP == Hexagon::V6_vconv_sf_qf32) ||
               (Def1OP != Hexagon::V6_vconv_hf_qf16 &&
@@ -262,7 +260,7 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
       return false;
 
     if (Inst2 && MRI->getRegClass(Inst2->getOperand(0).getReg()) ==
-        &Hexagon::HvxWRRegClass)
+                     &Hexagon::HvxWRRegClass)
       return false;
 
     MachineOperand &Src1 = MI->getOperand(1);
@@ -272,9 +270,9 @@ bool HexagonQFPoptimizer::optimizeQfp(MachineInstr *MI,
     Src2.setIsKill(false);
     Op0F = getKillRegState(Src1.isKill());
     MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), HII->get(InstTy), Res.getReg())
-        .addReg(Src2.getReg(), Op1F,
-                Src2.getSubReg()) // Notice the operands are flipped.
-        .addReg(Src1.getReg(), Op0F, Src1.getSubReg());
+              .addReg(Src2.getReg(), Op1F,
+                      Src2.getSubReg()) // Notice the operands are flipped.
+              .addReg(Src1.getReg(), Op0F, Src1.getSubReg());
     LLVM_DEBUG(dbgs() << "\n[Inserting]: "; MIB.getInstr()->dump());
     return true;
   }
@@ -297,8 +295,8 @@ bool HexagonQFPoptimizer::runOnMachineFunction(MachineFunction &MF) {
   MRI = &MF.getRegInfo();
 
   MachineFunction::iterator MBBI = MF.begin();
-  LLVM_DEBUG(dbgs() << "\n=== Running QFPOptimzer Pass for : " <<
-      MF.getName() << " Optimize intermediate conversions ===\n");
+  LLVM_DEBUG(dbgs() << "\n=== Running QFPOptimzer Pass for : " << MF.getName()
+                    << " Optimize intermediate conversions ===\n");
   while (MBBI != MF.end()) {
     MachineBasicBlock *MBB = &*MBBI;
     MachineBasicBlock::iterator MII = MBBI->instr_begin();
@@ -309,13 +307,13 @@ bool HexagonQFPoptimizer::runOnMachineFunction(MachineFunction &MF) {
       if (llvm::find(QFPInst, MI->getOpcode()) != QFPInst.end())
         if (MI->getOpcode() != Hexagon::V6_vconv_sf_qf32 &&
             MI->getOpcode() != Hexagon::V6_vconv_hf_qf16) {
-          LLVM_DEBUG(dbgs() << "\n###Analyzing for removal: ";MI->dump());
+          LLVM_DEBUG(dbgs() << "\n###Analyzing for removal: "; MI->dump());
           if (optimizeQfp(MI, MBB)) {
             MI->eraseFromParent();
             LLVM_DEBUG(dbgs() << "\t....Removing....");
             Changed = true;
           }
-       }
+        }
     }
     ++MBBI;
   }

``````````

</details>


https://github.com/llvm/llvm-project/pull/163843