[llvm] PHIElimination: add target hook to control reuse. (PR #163604)

Junjie Gu via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 16 07:05:37 PDT 2025


jgu222 wrote:

> I don't think this is the correct approach, but correct me if I'm mistaken. The underlying assumption of reusing the same virtual destination register is that in the worst case, values will be copied around (different register classes/banks, allocation). In the presented issue, it seems like there's an actual semantic difference between what the virtual registers represent in each block, depending on which threads is executing? This sounds more like a modeling issue rather than a problem with this specific pass. Maybe verifying that the register classes overlap can be a workaround in this specific case, but it seems like more issues will pop along the way.

Thought about using register class to check if reuse is okay, but give up as it is really up to a target. It is possible that two rhs-identical PHIs have their lhs in different register class,  and those two different rc could be interchangeable in one target, but not allowed in another.

The correctness here is up to how convergence is enforced for a gpu target. When favoring backedge for a loop, this exposes this issue.  I feel this is better to be decided by a target.

https://github.com/llvm/llvm-project/pull/163604


More information about the llvm-commits mailing list