[llvm] [RISCV] Allow large div peephole optimization for minsize (PR #163679)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 15 20:12:57 PDT 2025


================
@@ -68,3 +68,155 @@ define i32 @testsize4(i32 %x) minsize nounwind {
   %div = udiv i32 %x, 33
   ret i32 %div
 }
+
+define i128 @i128_sdiv(i128 %arg0) minsize nounwind {
+; RV32IM-LABEL: i128_sdiv:
+; RV32IM:       # %bb.0:
+; RV32IM-NEXT:    addi sp, sp, -64
+; RV32IM-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
+; RV32IM-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
+; RV32IM-NEXT:    lw a3, 0(a1)
+; RV32IM-NEXT:    lw a4, 4(a1)
+; RV32IM-NEXT:    lw a5, 8(a1)
+; RV32IM-NEXT:    lw a6, 12(a1)
+; RV32IM-NEXT:    mv s0, a0
+; RV32IM-NEXT:    li a7, 4
+; RV32IM-NEXT:    addi a0, sp, 40
+; RV32IM-NEXT:    addi a1, sp, 24
+; RV32IM-NEXT:    addi a2, sp, 8
+; RV32IM-NEXT:    sw a7, 8(sp)
+; RV32IM-NEXT:    sw zero, 12(sp)
+; RV32IM-NEXT:    sw zero, 16(sp)
+; RV32IM-NEXT:    sw zero, 20(sp)
+; RV32IM-NEXT:    sw a3, 24(sp)
+; RV32IM-NEXT:    sw a4, 28(sp)
+; RV32IM-NEXT:    sw a5, 32(sp)
+; RV32IM-NEXT:    sw a6, 36(sp)
+; RV32IM-NEXT:    call __divti3
----------------
topperc wrote:

Confirmed that libgcc doesn't have __divti3. PR to fix https://github.com/llvm/llvm-project/pull/163688

https://github.com/llvm/llvm-project/pull/163679


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