[llvm] [Hexagon] Define V91 ISA and Processor versions in ELF flags (PR #163631)

via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 15 14:27:03 PDT 2025


https://github.com/quic-areg created https://github.com/llvm/llvm-project/pull/163631

These versions are not supported by upstream LLVM but are needed to add support in the eld linker.

>From b15347886c6d433bd315a60deec5852687155e78 Mon Sep 17 00:00:00 2001
From: quic-areg <aregmi at quicinc.com>
Date: Wed, 15 Oct 2025 14:25:34 -0700
Subject: [PATCH] [Hexagon] Define V91 ISA and Processor versions in ELF flags

These versions are not supported by upstream LLVM but are needed
to add support in the eld linker.
---
 llvm/include/llvm/BinaryFormat/ELF.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h
index e619b186dfe3d..8d0dc64199ebf 100644
--- a/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/llvm/include/llvm/BinaryFormat/ELF.h
@@ -647,6 +647,7 @@ enum {
   EF_HEXAGON_ISA_V85 = 0x00000085,  // Hexagon V85 ISA
   EF_HEXAGON_ISA_V87 = 0x00000087,  // Hexagon V87 ISA
   EF_HEXAGON_ISA_V89 = 0x00000089,  // Hexagon V89 ISA
+  EF_HEXAGON_ISA_V91 = 0x00000091,  // Hexagon V91 ISA
   EF_HEXAGON_ISA = 0x000003ff,      // Hexagon V.. ISA
 
   // Tiny core flag, bit[15]
@@ -680,6 +681,7 @@ enum {
   EF_HEXAGON_MACH_V85 = EF_HEXAGON_ISA_V85,      // Hexagon V85
   EF_HEXAGON_MACH_V87 = EF_HEXAGON_ISA_V87,      // Hexagon V87
   EF_HEXAGON_MACH_V89 = EF_HEXAGON_ISA_V89,      // Hexagon V89
+  EF_HEXAGON_MACH_V91 = EF_HEXAGON_ISA_V91,      // Hexagon V91
 
   EF_HEXAGON_MACH = 0x0000ffff, // Hexagon V..
 };



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