[llvm] [X86][GlobalIsel] Support G_IS_FPCLASS (PR #162232)

[via llvm-commits]

mahesh-attarde wrote:

> @mahesh-attarde please can you investigate the EXPENSIVE_CHECKS build failures?
Failure reported here is related to G_CONSTANT i8 0. GIR.
During ISEL it was selected with MOV32r0, further 8bit Reg EXTRACT using pattern `0:{ *:[i8] }  =>  (EXTRACT_SUBREG:{ *:[i8] } (MOV32r0:{ *:[i32] }:{ *:[i32] }), sub_8bit:{ *:[i32] })`. It is same pattern used from DAG. Change here is about regbank (gr32) that did not same as DAG(gr32_abcd).

GISEL LOG
```
# After InstructionSelect
# Machine code for function isnone_f: IsSSA, TracksLiveness, Legalized, RegBankSelected, Selected
Frame Objects:
  fi#-1: size=4, align=16, fixed, at location [SP+4]
save/restore points:
save points are empty
restore points are empty

bb.1.entry:
  %5:gr32 = MOV32r0 implicit-def dead $eflags
  %4:gr8 = COPY %5.sub_8bit:gr32
  $al = COPY %4:gr8
  RET 0, implicit $al

# End machine code for function isnone_f.

*** Bad machine code: Invalid register class for subregister index ***
- function:    isnone_f
- basic block: %bb.1 entry (0x5e1917110858)
- instruction: %4:gr8 = COPY %5.sub_8bit:gr32
- operand 1:   %5.sub_8bit:gr32
Register class GR32 does not fully support subreg index sub_8bit
LLVM ERROR: Found 1 machine code errors.
```
DAG LOG
```
bb.0.entry:
  %0:gr32_abcd = MOV32r0 implicit-def dead $eflags
  %1:gr8 = COPY %0.sub_8bit:gr32_abcd
  $al = COPY %1:gr8
  RET 0, $al
```
I tried few approaches to deal with same, those ended up with regressions on DAG. I this takes up more time, I will submit disabling for i686 RUN and continue fixing it. 


https://github.com/llvm/llvm-project/pull/162232