[llvm] [InstCombinePHI] Enhance PHI CSE to remove redundant phis (PR #163453)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 15 09:11:11 PDT 2025
https://github.com/CongzheUalberta updated https://github.com/llvm/llvm-project/pull/163453
>From 471578931f5a013abf0d31f60829fd771f93c2c9 Mon Sep 17 00:00:00 2001
From: Congzhe Cao <congzhe.cao at huawei.com>
Date: Tue, 14 Oct 2025 17:04:54 -0400
Subject: [PATCH] [InstCombinePHI] Enhance PHI CSE to remove redundant phis
Enhanced PHI CSE to eliminate redundant PHIs, which could clean up
the IR and open up opportunities for other passes such as loop
vectorization.
---
.../Transforms/InstCombine/InstCombinePHI.cpp | 89 +++++++++++++++++--
.../InstCombine/enhanced-phi-cse.ll | 61 +++++++++++++
2 files changed, 145 insertions(+), 5 deletions(-)
create mode 100644 llvm/test/Transforms/InstCombine/enhanced-phi-cse.ll
diff --git a/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp b/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
index 9815644f5f43d..e736e89a3a146 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
@@ -1621,11 +1621,90 @@ Instruction *InstCombinerImpl::visitPHINode(PHINode &PN) {
// Note that even though we've just canonicalized this PHI, due to the
// worklist visitation order, there are no guarantess that *every* PHI
// has been canonicalized, so we can't just compare operands ranges.
- if (!PN.isIdenticalToWhenDefined(&IdenticalPN))
- continue;
- // Just use that PHI instead then.
- ++NumPHICSEs;
- return replaceInstUsesWith(PN, &IdenticalPN);
+ if (PN.isIdenticalToWhenDefined(&IdenticalPN)) {
+ // Just use that PHI instead then.
+ ++NumPHICSEs;
+ return replaceInstUsesWith(PN, &IdenticalPN);
+ }
+
+ // Look for the following pattern and do PHI CSE to clean up the
+ // redundant %phi. Here %phi, %1 and %phi.next perform the same
+ // functionality as %identicalPhi and hence %phi can be eliminated.
+ //
+ // BB1:
+ // %identicalPhi = phi [ X, %BB0 ], [ %identicalPhi.next, %BB1 ]
+ // %phi = phi [ X, %BB0 ], [ %phi.next, %BB1 ]
+ // ...
+ // %identicalPhi.next = select %cmp, %val, %identicalPhi
+ // %1 = select %cmp2, %identicalPhi, float %phi
+ // %phi.next = select %cmp, %val, %1
+ //
+ // Prove that %phi and %identicalPhi are the same by induction:
+ //
+ // Base case: Both %phi and %identicalPhi are equal on entry to the loop.
+ // Inductive case:
+ // Suppose %phi and %identicalPhi are equal at iteration i.
+ // We look at their values at iteration i+1 which are %phi.next and
+ // %identicalPhi.next. They would have become different only when %cmp is
+ // false and the corresponding values %1 and %identicalPhi differ.
+ //
+ // The only condition when %1 and %identicalPh could differ is when %cmp2
+ // is false and %1 is %phi, which contradicts our inductive hypothesis
+ // that %phi and %identicalPhi are equal. Thus %phi and %identicalPhi are
+ // always equal at iteration i+1.
+
+ if (PN.getNumIncomingValues() == 2 && PN.getNumUses() == 1) {
+ unsigned diffVals = 0;
+ unsigned diffValIdx = 0;
+ // Check that only the backedge incoming value is different.
+ for (unsigned i = 0; i < 2; i++) {
+ if (PN.getIncomingValue(i) != IdenticalPN.getIncomingValue(i)) {
+ diffVals++;
+ diffValIdx = i;
+ }
+ }
+ BasicBlock *CurBB = PN.getParent();
+ if (diffVals == 2 || PN.getIncomingBlock(diffValIdx) != CurBB)
+ continue;
+ // Now check that the backedge incoming values are two select
+ // instructions that are in the same BB, and have the same condition,
+ // true value.
+ auto *Val = PN.getIncomingValue(diffValIdx);
+ auto *IdenticalVal = IdenticalPN.getIncomingValue(diffValIdx);
+ if (!isa<SelectInst>(Val) || !isa<SelectInst>(IdenticalVal))
+ continue;
+
+ auto *SI = cast<SelectInst>(Val);
+ auto *IdenticalSI = cast<SelectInst>(IdenticalVal);
+ if (SI->getParent() != CurBB || IdenticalSI->getParent() != CurBB)
+ continue;
+ if (SI->getCondition() != IdenticalSI->getCondition() ||
+ SI->getTrueValue() != IdenticalSI->getTrueValue())
+ continue;
+
+ // Now check that the false values, i.e., %1 and %identicalPhi,
+ // are essentially the same value within the same BB.
+ auto SameSelAndPhi = [&](SelectInst *SI, PHINode *IdenticalPN,
+ PHINode *PN) {
+ if (SI->getTrueValue() == IdenticalPN) {
+ return SI->getFalseValue() == PN;
+ }
+ return false;
+ };
+ auto *FalseVal = SI->getFalseValue();
+ auto *IdenticalSIFalseVal =
+ dyn_cast<PHINode>(IdenticalSI->getFalseValue());
+ if (!isa<SelectInst>(FalseVal) || !IdenticalSIFalseVal ||
+ IdenticalSIFalseVal != &IdenticalPN)
+ continue;
+ auto *FalseValSI = cast<SelectInst>(FalseVal);
+ if (FalseValSI->getParent() != CurBB ||
+ !SameSelAndPhi(FalseValSI, &IdenticalPN, &PN))
+ continue;
+
+ ++NumPHICSEs;
+ return replaceInstUsesWith(PN, &IdenticalPN);
+ }
}
// If this is an integer PHI and we know that it has an illegal type, see if
diff --git a/llvm/test/Transforms/InstCombine/enhanced-phi-cse.ll b/llvm/test/Transforms/InstCombine/enhanced-phi-cse.ll
new file mode 100644
index 0000000000000..79cb59ea8bbbc
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/enhanced-phi-cse.ll
@@ -0,0 +1,61 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -S -passes=instcombine | FileCheck %s
+ at A = extern_weak global float, align 4
+
+; %phi.to.remove acts the same as %v1, and can be eliminated with PHI CSE.
+define void @enhanced_phi_cse(ptr %m, ptr %n, i32 %count) {
+; CHECK-LABEL: @enhanced_phi_cse(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[V0:%.*]] = phi float [ 0x4415AF1D80000000, [[ENTRY:%.*]] ], [ [[V0_1:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[V1:%.*]] = phi float [ 0xC415AF1D80000000, [[ENTRY]] ], [ [[V1_1:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC_I:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[Q:%.*]] = phi ptr [ [[M:%.*]], [[ENTRY]] ], [ [[Q_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[C:%.*]] = phi ptr [ [[N:%.*]], [[ENTRY]] ], [ [[C_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[Q_LOAD:%.*]] = load float, ptr [[Q]], align 4
+; CHECK-NEXT: [[C_LOAD:%.*]] = load float, ptr [[C]], align 4
+; CHECK-NEXT: [[SUB:%.*]] = fsub float [[Q_LOAD]], [[C_LOAD]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt float [[SUB]], [[V0]]
+; CHECK-NEXT: [[V0_1]] = select i1 [[CMP1]], float [[SUB]], float [[V0]]
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ogt float [[SUB]], [[V1]]
+; CHECK-NEXT: [[V1_1]] = select i1 [[CMP2]], float [[SUB]], float [[V1]]
+; CHECK-NEXT: [[INC_I]] = add nuw nsw i32 [[I]], 1
+; CHECK-NEXT: [[Q_NEXT]] = getelementptr inbounds nuw i8, ptr [[Q]], i64 4
+; CHECK-NEXT: [[C_NEXT]] = getelementptr inbounds nuw i8, ptr [[C]], i64 4
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC_I]], [[COUNT:%.*]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[FOR_BODY]]
+; CHECK: exit:
+; CHECK-NEXT: store float [[V1_1]], ptr @A, align 4
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %v0 = phi float [ 0x4415AF1D80000000, %entry ], [ %v0.1, %for.body ]
+ %v1 = phi float [ 0xC415AF1D80000000, %entry ], [ %v1.1, %for.body ]
+ %phi.to.remove = phi float [ 0xC415AF1D80000000, %entry ], [ %phi.to.remove.next, %for.body ]
+ %i = phi i32 [ 0, %entry ], [ %inc.i, %for.body ]
+ %q = phi ptr [ %m, %entry ], [ %q.next, %for.body ]
+ %c = phi ptr [ %n, %entry ], [ %c.next, %for.body ]
+ %q.load = load float, ptr %q
+ %c.load = load float, ptr %c
+ %sub = fsub float %q.load, %c.load
+ %cmp1 = fcmp olt float %sub, %v0
+ %v0.1 = select i1 %cmp1, float %sub, float %v0
+ %same.as.v1 = select i1 %cmp1, float %v1, float %phi.to.remove
+ %cmp2 = fcmp ogt float %sub, %same.as.v1
+ %v1.1 = select i1 %cmp2, float %sub, float %v1
+ %phi.to.remove.next = select i1 %cmp2, float %sub, float %same.as.v1
+ %inc.i = add nuw nsw i32 %i, 1
+ %q.next = getelementptr inbounds i8, ptr %q, i64 4
+ %c.next = getelementptr inbounds i8, ptr %c, i64 4
+ %exitcond = icmp eq i32 %inc.i, %count
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ %vl.1.lcssa = phi float [ %v1.1, %for.body ]
+ store float %vl.1.lcssa, ptr @A
+ ret void
+}
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