[llvm] [AMDGPU][SIMemoryLegalizer][GFX12] Correctly insert sample/bvhcnt (PR #161637)

[Pierre van Houtryve via llvm-commits]

Pierre-vh wrote:

> So a more interesting test case would be when those waits were not eliminated, because they were preceded by some SAMPLE/BVH instructions.

I can't write such a test case, they were always eliminated because they were inserted only for >acquire, which means acq_rel or seq_cst. In both of these orderings, we'd insert a release sequence before the acquire sequence, and the release has the bvh/sample waits.

This patch should be a NFC for optimized code.

https://github.com/llvm/llvm-project/pull/161637