[llvm] [ARM] Allow usubo and uaddo to happen for any legal type (PR #163457)

[via llvm-commits]

https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/163457

>From 90892db336bbb6150d4b2ed12706122641652557 Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Tue, 14 Oct 2025 17:36:29 -0400
Subject: [PATCH] [ARM] Allow usubo and uaddo to happen for any legal type

---
 llvm/lib/Target/ARM/ARMISelLowering.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 70aa001a41885..1d18c694d23aa 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -641,8 +641,9 @@ class VectorType;
 
     bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
                               bool MathUsed) const override {
-      // Using overflow ops for overflow checks only should beneficial on ARM.
-      return TargetLowering::shouldFormOverflowOp(Opcode, VT, true);
+      if (VT.isVector())
+        return false;
+      return !isOperationExpand(Opcode, VT);
     }
 
     bool shouldReassociateReduction(unsigned Opc, EVT VT) const override {