[llvm] Allow Specifying SGMasks for Inline Asm (PR #155491)

[Patrick Simmons via llvm-commits]

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@@ -2391,6 +2391,61 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
   if (MI.isMetaInstruction())
     Result = false;
 
+  else if (MI.isInlineAsm()) {
+    auto &TRI = TII->getRegisterInfo();
+    auto &MRI = MI.getParent()->getParent()->getRegInfo();
+    bool SGPR_used = false, VGPR_used = false, VMFMA_used = false,
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linuxrocks123 wrote:

The booleans are set based on register usage, so I think they are appropriately named.  The heuristic for guessing what type of instruction the inline asm is uses those variables and does additional logic to decide how to set SGMask.

https://github.com/llvm/llvm-project/pull/155491