[llvm] [Transform][LoadStoreVectorizer] allow redundant in Chain (PR #163019)

[Artem Belevich via llvm-commits]

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@@ -33,8 +33,10 @@ define amdgpu_kernel void @no_crash(i32 %arg) {
 ; GCN: store <2 x i32> zeroinitializer{{.*}} %tmp1
 ; GCN: load <2 x i32>{{.*}} %tmp2
 ; GCN: load <2 x i32>{{.*}} %tmp4
-; GCN: load i32{{.*}} %tmp5
-; GCN: load i32{{.*}} %tmp5
+; GCN: extractelement <2 x i32>
+; GCN: extractelement <2 x i32>
+; GCN: extractelement <2 x i32>
+; GCN: extractelement <2 x i32>
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Artem-B wrote:

Any chance this test could be converted to use automatically generated checks?

Checking for multiple identical instructions with no inputs/outputs captured only gives a rather vague idea of what we're checking for and whether the new code is an improvement or not.

E.g. I can't tell whether the extractelement are the newly added instructions, or whether they existed in the old version of the test but the test just didn't check for them.

https://github.com/llvm/llvm-project/pull/163019