[llvm] [PowerPC] fold i128 equality/inequality compares of two loads into a vectorized compare using vcmpequb.p when Altivec is available (PR #158657)
zhijian lin via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 14 09:06:05 PDT 2025
================
@@ -122,23 +117,17 @@ define signext i32 @equalityFoldOneConstant(ptr %X) {
; CHECK-LABEL: equalityFoldOneConstant:
; CHECK: # %bb.0:
; CHECK-NEXT: li 5, 1
-; CHECK-NEXT: ld 4, 0(3)
+; CHECK-NEXT: ld 4, 8(3)
+; CHECK-NEXT: ld 3, 0(3)
; CHECK-NEXT: rldic 5, 5, 32, 31
-; CHECK-NEXT: cmpld 4, 5
-; CHECK-NEXT: bne 0, .LBB6_2
-; CHECK-NEXT: # %bb.1: # %loadbb1
+; CHECK-NEXT: xor 3, 3, 5
; CHECK-NEXT: lis 5, -32768
-; CHECK-NEXT: ld 4, 8(3)
-; CHECK-NEXT: li 3, 0
; CHECK-NEXT: ori 5, 5, 1
; CHECK-NEXT: rldic 5, 5, 1, 30
-; CHECK-NEXT: cmpld 4, 5
-; CHECK-NEXT: beq 0, .LBB6_3
-; CHECK-NEXT: .LBB6_2: # %res_block
-; CHECK-NEXT: li 3, 1
-; CHECK-NEXT: .LBB6_3: # %endblock
-; CHECK-NEXT: cntlzw 3, 3
-; CHECK-NEXT: srwi 3, 3, 5
+; CHECK-NEXT: xor 4, 4, 5
+; CHECK-NEXT: or 3, 3, 4
+; CHECK-NEXT: cntlzd 3, 3
+; CHECK-NEXT: rldicl 3, 3, 58, 63
----------------
diggerlin wrote:
since we change the
[llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp](https://github.com/llvm/llvm-project/pull/158657/files/24bb9f4d13050cd0d8e4db7df240ce55ce4a611b#diff-c3b49360a8dbbb7be8915248bbbf464ff24c7a4bfd01eaaba0c739242d25ece9)
the with 16 bytes support, it change the IR which generated by MergeICmpsLegacyPass to
```
t5: i128,ch = load<(load (s128) from %ir.X, align 1)> t0, t2, undef:i64
t8: i1 = setcc Constant:i128<237684487579686500932345921536>, t5, setne:ch
```
I think we can have another to optimize patch further and make the asm as load vector from memory and compared 2 two vector.
https://github.com/llvm/llvm-project/pull/158657
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