[llvm] c67c5b4 - [llvm][RISCV] Correct the order of statement in insertVSETMTK (#163215)

[via llvm-commits]

Author: Brandon Wu
Date: 2025-10-13T17:30:14Z
New Revision: c67c5b47ad6cc1316f21c2cdd993d994755c976b

URL: https://github.com/llvm/llvm-project/commit/c67c5b47ad6cc1316f21c2cdd993d994755c976b
DIFF: https://github.com/llvm/llvm-project/commit/c67c5b47ad6cc1316f21c2cdd993d994755c976b.diff

LOG: [llvm][RISCV] Correct the order of statement in insertVSETMTK (#163215)

We need to set register to noreg before shrinking interval

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 278cf6dc1d786..9ed3b97d1dc79 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1945,9 +1945,12 @@ bool RISCVInsertVSETVLI::insertVSETMTK(MachineBasicBlock &MBB,
                      .addImm(Log2_32(CurrInfo.getTWiden()) + 1);
 
     Changed = true;
+    Register Reg = Op.getReg();
+    Op.setReg(Register());
+    Op.setIsKill(false);
     if (LIS) {
       LIS->InsertMachineInstrInMaps(*TmpMI);
-      LiveInterval &LI = LIS->getInterval(Op.getReg());
+      LiveInterval &LI = LIS->getInterval(Reg);
 
       // Erase the AVL operand from the instruction.
       LIS->shrinkToUses(&LI);
@@ -1955,9 +1958,6 @@ bool RISCVInsertVSETVLI::insertVSETMTK(MachineBasicBlock &MBB,
       // SmallVector<LiveInterval *> SplitLIs;
       // LIS->splitSeparateComponents(LI, SplitLIs);
     }
-
-    Op.setReg(RISCV::NoRegister);
-    Op.setIsKill(false);
   }
   return Changed;
 }