[llvm] 5e3ac2a - [LV] Bail out on loops with switch as latch terminator.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2025-10-12T21:20:35+01:00
New Revision: 5e3ac2a6f22aa4d1d055c2d430913a960b9bb60b

URL: https://github.com/llvm/llvm-project/commit/5e3ac2a6f22aa4d1d055c2d430913a960b9bb60b
DIFF: https://github.com/llvm/llvm-project/commit/5e3ac2a6f22aa4d1d055c2d430913a960b9bb60b.diff

LOG: [LV] Bail out on loops with switch as latch terminator.

Currently we cannot vectorize loops with latch blocks terminated by a
switch. In the future this could be handled by materializing appropriate
compares.

Fixes https://github.com/llvm/llvm-project/issues/156894.

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
    llvm/test/Transforms/LoopVectorize/loop-form.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
index 7d376c370bb1c..fdfff16132093 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
@@ -1642,6 +1642,19 @@ bool LoopVectorizationLegality::canVectorizeLoopCFG(Loop *Lp,
       return false;
   }
 
+  // The latch must be terminated by a BranchInst.
+  BasicBlock *Latch = Lp->getLoopLatch();
+  if (Latch && !isa<BranchInst>(Latch->getTerminator())) {
+    reportVectorizationFailure(
+        "The loop latch terminator is not a BranchInst",
+        "loop control flow is not understood by vectorizer", "CFGNotUnderstood",
+        ORE, TheLoop);
+    if (DoExtraAnalysis)
+      Result = false;
+    else
+      return false;
+  }
+
   return Result;
 }
 

diff  --git a/llvm/test/Transforms/LoopVectorize/loop-form.ll b/llvm/test/Transforms/LoopVectorize/loop-form.ll
index aed1e2920bbdc..4db3d1eed4771 100644
--- a/llvm/test/Transforms/LoopVectorize/loop-form.ll
+++ b/llvm/test/Transforms/LoopVectorize/loop-form.ll
@@ -1374,3 +1374,49 @@ exit.1:
 exit.2:
   ret i16 1
 }
+
+; Loop with a switch terminator in the latch block. Cannot be vectorized
+; currently.
+; Test case for https://github.com/llvm/llvm-project/issues/156894.
+define void @switch_in_latch(ptr %a) {
+; CHECK-LABEL: @switch_in_latch(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[GEP:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]
+; CHECK-NEXT:    store i32 1, ptr [[GEP]], align 4
+; CHECK-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT:    switch i32 [[IV_NEXT]], label [[LOOP]] [
+; CHECK-NEXT:      i32 100, label [[EXIT:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+;
+; TAILFOLD-LABEL: @switch_in_latch(
+; TAILFOLD-NEXT:  entry:
+; TAILFOLD-NEXT:    br label [[LOOP:%.*]]
+; TAILFOLD:       loop:
+; TAILFOLD-NEXT:    [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; TAILFOLD-NEXT:    [[GEP:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]
+; TAILFOLD-NEXT:    store i32 1, ptr [[GEP]], align 4
+; TAILFOLD-NEXT:    [[IV_NEXT]] = add i32 [[IV]], 1
+; TAILFOLD-NEXT:    switch i32 [[IV_NEXT]], label [[LOOP]] [
+; TAILFOLD-NEXT:      i32 100, label [[EXIT:%.*]]
+; TAILFOLD-NEXT:    ]
+; TAILFOLD:       exit:
+; TAILFOLD-NEXT:    ret void
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
+  %gep = getelementptr i32, ptr %a, i32 %iv
+  store i32 1, ptr %gep, align 4
+  %iv.next = add i32 %iv, 1
+  switch i32 %iv.next, label %loop [i32 100, label %exit]
+
+exit:
+  ret void
+}