[llvm] [AMDGPU] Enable "amdgpu-uniform-intrinsic-combine" pass in pipeline. (PR #162819)
Pankaj Dwivedi via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 10 04:22:38 PDT 2025
================
@@ -148,6 +148,62 @@ static bool runUniformIntrinsicCombine(Module &M, ModuleAnalysisManager &AM) {
return IsChanged;
}
+// Legacy PM version
+static bool runUniformIntrinsicCombine(Module &M, ModulePass &P) {
+ bool IsChanged = false;
+ ValueMap<const Value *, bool> Tracker;
+
+ for (Function &F : M) {
+ switch (F.getIntrinsicID()) {
+ case Intrinsic::amdgcn_permlane64:
+ case Intrinsic::amdgcn_readfirstlane:
+ case Intrinsic::amdgcn_readlane:
+ case Intrinsic::amdgcn_ballot:
+ break;
+ default:
+ continue;
+ }
+
+ for (User *U : make_early_inc_range(F.users())) {
+ auto *II = cast<IntrinsicInst>(U);
+ Function *ParentF = II->getFunction();
+ auto &UI = P.getAnalysis<UniformityInfoWrapperPass>(*ParentF)
+ .getUniformityInfo();
+ IsChanged |= optimizeUniformIntrinsic(*II, UI, Tracker);
+ }
+ }
+ return IsChanged;
+}
+
+namespace {
+class AMDGPUUniformIntrinsicCombineLegacy : public ModulePass {
----------------
PankajDwivedi-25 wrote:
I think its ok to have separately. Initially, it was part of the base PR. after reviews I dropped it.
https://github.com/llvm/llvm-project/pull/162819
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