[llvm] [LLVM][DAGCombiner] Improve simplifyDivRem's effectiveness after type legalisation. (PR #162706)

[Paul Walker via llvm-commits]

================
@@ -5042,7 +5042,7 @@ static SDValue simplifyDivRem(SDNode *N, SelectionDAG &DAG) {
 
   unsigned Opc = N->getOpcode();
   bool IsDiv = (ISD::SDIV == Opc) || (ISD::UDIV == Opc);
-  ConstantSDNode *N1C = isConstOrConstSplat(N1);
+  ConstantSDNode *N1C = isConstOrConstSplat(N1, false, true);
----------------
paulwalker-arm wrote:

I've followed @hazzlim's suggestion to use `isOneOrOneSplat` and remove this line.

https://github.com/llvm/llvm-project/pull/162706