[llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)

[Matt Arsenault via llvm-commits]

================
@@ -7611,6 +7608,33 @@ void SIInstrInfo::legalizeOperandsVALUt16(MachineInstr &MI,
     legalizeOperandsVALUt16(MI, OpIdx, MRI);
 }
 
+void SIInstrInfo::createWaterFall(MachineInstr *MI, MachineDominatorTree *MDT,
+                                  ArrayRef<MachineOperand *> ScalarOps,
+                                  ArrayRef<Register> PhySGPRs) const {
+  if (MI->getOpcode() == AMDGPU::SI_CALL_ISEL) {
+    // Move everything between ADJCALLSTACKUP and ADJCALLSTACKDOWN and
+    // following copies, we also need to move copies from and to physical
+    // registers into the loop block.
+    // Also move the copies to physical registers into the loop block
+    MachineBasicBlock &MBB = *MI->getParent();
+    MachineBasicBlock::iterator Start(MI);
+    while (Start->getOpcode() != AMDGPU::ADJCALLSTACKUP)
+      --Start;
+    MachineBasicBlock::iterator End(MI);
+    while (End->getOpcode() != AMDGPU::ADJCALLSTACKDOWN)
+      ++End;
+
+    // Also include following copies of the return value
+    ++End;
+    while (End != MBB.end() && End->isCopy() && End->getOperand(1).isReg() &&
----------------
arsenm wrote:

If End is a copy, the operands must be registers
```suggestion
    while (End != MBB.end() && End->isCopy() &&
```

https://github.com/llvm/llvm-project/pull/146997