[llvm] [AMDGPU] Remove redundant s_cmp_lg_* sX, 0 (PR #162352)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 10 00:19:30 PDT 2025


================
@@ -10577,6 +10577,67 @@ bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
   if (SrcReg2 && !getFoldableImm(SrcReg2, *MRI, CmpValue))
     return false;
 
+  const auto optimizeCmpSelect = [&CmpInstr, SrcReg, CmpValue, MRI,
+                                  this]() -> bool {
+    if (CmpValue != 0)
+      return false;
+
+    MachineInstr *Def = MRI->getUniqueVRegDef(SrcReg);
+    if (!Def || Def->getParent() != CmpInstr.getParent())
+      return false;
+
+    bool CanOptimize = false;
+    MachineOperand *SccDef =
+        Def->findRegisterDefOperand(AMDGPU::SCC, /*TRI=*/nullptr);
+
+    // For S_OP that set SCC = DST!=0, do the transformation
+    //
+    //   s_cmp_lg_* (S_OP ...), 0 => (S_OP ...)
+    if (SccDef && Def->getOpcode() != AMDGPU::S_ADD_I32 &&
+        Def->getOpcode() != AMDGPU::S_ADD_U32 &&
+        Def->getOpcode() != AMDGPU::S_ADDC_U32 &&
+        Def->getOpcode() != AMDGPU::S_SUB_I32 &&
+        Def->getOpcode() != AMDGPU::S_SUB_U32 &&
+        Def->getOpcode() != AMDGPU::S_SUBB_U32 &&
+        Def->getOpcode() != AMDGPU::S_MIN_I32 &&
+        Def->getOpcode() != AMDGPU::S_MIN_U32 &&
+        Def->getOpcode() != AMDGPU::S_MAX_I32 &&
+        Def->getOpcode() != AMDGPU::S_MAX_U32 &&
+        Def->getOpcode() != AMDGPU::S_ADDK_I32)
----------------
arsenm wrote:

Can you pull this check into a utility function with a switch 

https://github.com/llvm/llvm-project/pull/162352


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