[llvm] [AMDGPU] Do not put memory instructions in *ALU SchedGroups (PR #162560)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 9 20:56:39 PDT 2025
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@@ -2394,15 +2394,18 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
else if (((SGMask & SchedGroupMask::ALU) != SchedGroupMask::NONE) &&
(TII->isVALU(MI) || TII->isMFMAorWMMA(MI) || TII->isSALU(MI) ||
TII->isTRANS(MI)))
- Result = true;
+ Result = !(MI.mayLoad() || MI.mayLoad());
else if (((SGMask & SchedGroupMask::VALU) != SchedGroupMask::NONE) &&
TII->isVALU(MI) && !TII->isMFMAorWMMA(MI) && !TII->isTRANS(MI))
- Result = true;
+ // Some memory instructions may be marked as VALU (e.g. BUFFER_LOAD_*_LDS).
+ // For our purposes, these shall not be classified as VALU as this results
+ // in unexpected behavior.
+ Result = !(MI.mayLoad() || MI.mayLoad());
else if (((SGMask & SchedGroupMask::SALU) != SchedGroupMask::NONE) &&
TII->isSALU(MI))
- Result = true;
+ Result = !(MI.mayLoad() || MI.mayLoad());
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arsenm wrote:
Ditto
https://github.com/llvm/llvm-project/pull/162560
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