[llvm] [LLVM][DAGCombiner] Improve simplifyDivRem's effectiveness after type legalisation. (PR #162706)

[Matt Arsenault via llvm-commits]

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@@ -5042,7 +5042,7 @@ static SDValue simplifyDivRem(SDNode *N, SelectionDAG &DAG) {
 
   unsigned Opc = N->getOpcode();
   bool IsDiv = (ISD::SDIV == Opc) || (ISD::UDIV == Opc);
-  ConstantSDNode *N1C = isConstOrConstSplat(N1);
+  ConstantSDNode *N1C = isConstOrConstSplat(N1, false, true);
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arsenm wrote:

I have no idea what these arguments are, comment them or use some named wrapper? 

https://github.com/llvm/llvm-project/pull/162706