[llvm] [MIR2Vec] Add embedder for machine instructions (PR #162161)
Mircea Trofin via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 9 12:03:06 PDT 2025
================
@@ -190,6 +197,29 @@ void MIRVocabulary::buildCanonicalOpcodeMapping() {
<< " unique base opcodes\n");
}
+MIRVocabulary MIRVocabulary::createDummyVocabForTest(const TargetInstrInfo &TII,
+ unsigned Dim) {
+ assert(Dim > 0 && "Dimension must be greater than zero");
+
+ float DummyVal = 0.1f;
+
+ // Create a temporary vocabulary instance to build canonical mapping
+ MIRVocabulary TempVocab({}, &TII);
+ TempVocab.buildCanonicalOpcodeMapping();
+
+ // Create dummy embeddings for all canonical opcode names
+ VocabMap DummyVocabMap;
+ for (const auto &COpcodeName : TempVocab.UniqueBaseOpcodeNames) {
+ // Create dummy embedding filled with DummyVal
+ Embedding DummyEmbedding(Dim, DummyVal);
+ DummyVocabMap[COpcodeName] = DummyEmbedding;
+ DummyVal += 0.1f;
----------------
mtrofin wrote:
oooh! yes. didn't see the use on line 217
https://github.com/llvm/llvm-project/pull/162161
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