[llvm] [LLVM][DAGCombiner] Improve simplifyDivRem's effectiveness after type legalisation. (PR #162706)

[Hari Limaye via llvm-commits]

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@@ -5042,7 +5042,7 @@ static SDValue simplifyDivRem(SDNode *N, SelectionDAG &DAG) {
 
   unsigned Opc = N->getOpcode();
   bool IsDiv = (ISD::SDIV == Opc) || (ISD::UDIV == Opc);
-  ConstantSDNode *N1C = isConstOrConstSplat(N1);
+  ConstantSDNode *N1C = isConstOrConstSplat(N1, false, true);
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hazzlim wrote:

Seeing as N1C only has one use, I'm wondering if it's maybe nicer to replace the (single) use below with `isOneOrOneSplat`, which already allows truncation?
```
-  if ((N1C && N1C->isOne()) || (VT.getScalarType() == MVT::i1))
+  if (isOneOrOneSplat(N1) || (VT.getScalarType() == MVT::i1))
```

https://github.com/llvm/llvm-project/blob/5cef6f38c0c7a59d8ce0854d04613d8606326023/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L5077

https://github.com/llvm/llvm-project/pull/162706