[llvm] [AMDGPU][True16][CodeGen] Add patterns to reduce intermediates (PR #162047)

[Joe Nash via llvm-commits]

https://github.com/Sisyph approved this pull request.

Yes, in practice I think the register class there will be ignored; it's only the i16 there that matters. LGTM

https://github.com/llvm/llvm-project/pull/162047