[llvm] [RISCV][llvm] Preliminary P extension codegen support (PR #162668)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 9 08:34:21 PDT 2025
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@@ -1455,3 +1455,127 @@ let Predicates = [HasStdExtP, IsRV32] in {
def PMAXU_DW : RVPPairBinaryExchanged_rr<0b1111, 0b01, "pmaxu.dw">;
def PMAXU_DB : RVPPairBinaryExchanged_rr<0b1111, 0b10, "pmaxu.db">;
} // Predicates = [HasStdExtP, IsRV32]
+
+let Predicates = [HasStdExtP, IsRV64] in {
+ // Basic arithmetic patterns for v4i16 (16-bit elements in 64-bit GPR)
+ def: Pat<(v4i16 (add v4i16:$rs1, v4i16:$rs2)), (!cast<Instruction>("PADD_H") GPR:$rs1, GPR:$rs2)>;
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topperc wrote:
Using `v4i16:$rs1` is not standard tablegen syntax.
https://github.com/llvm/llvm-project/pull/162668
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