[llvm] [AArch64][SVE] Allow factors other than 2/4 for load+deinterleave3+store patterns for codegen (PR #162475)

[Paul Walker via llvm-commits]

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@@ -0,0 +1,74 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-none-elf -mattr=+sve | FileCheck %s -check-prefixes=SVE
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paulwalker-arm wrote:

While the code change is in AArch64ISelLowering the affected function does not really relate to code generation.  It's part of InterleavedAccessPass that is an IR pass.  Its tests live in `llvm/test/Transforms/InterleavedAccess/AArch64` so it'll be better to create an 3-way variant of `scalable-deinterleave-intrinsics.ll`.

https://github.com/llvm/llvm-project/pull/162475