[llvm] [LoopIdiom] Fix a DL-related crash in optimizeCRCLoop (PR #161509)
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Thu Oct 9 02:57:57 PDT 2025
Guohua-W wrote:
> > Hello, I have a question: Can HashRecognize recognize both byte-level and bit-level CRC computations? If I have designed dedicated hardware instructions for the RISC-V architecture, how can I leverage the results from HashRecognize to optimize the code by replacing software CRC computations with these hardware instructions?
>
> Currently, HashRecognize recognizes bit-level CRC computations and LoopIdiom optimizes it using a byte-level table-lookup. I think the pending work to enable the use of hardware instructions is to introduce a generic llvm.clmul, but nobody is working on it at the moment. Kindly feel free to pick up the task, if you're so inclined.
Thank you for your response. You've done a fantastic job, and your answers have truly inspired me. I'm relatively new to LLVM, and my current goal is to recognize CRC loops and optimize them using my custom instructions. For example, I've already implemented a hardware instruction like CRC32C.B rd, rs1, rs2 in hardware. I can invoke this instruction through an intrinsic function, such as @llvm.riscv.crc32.b. I'd like to leverage the results from HashRecognize to achieve this optimization. Could you please give me some practical advice on how to proceed?
https://github.com/llvm/llvm-project/pull/161509
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