[llvm] [AMDGPU] Make sort ordering in `AMDGPURewriteAGPRCopyMFMAImpl::eliminateSpillsOfReassignedVGPRs()` strict weak. (PR #162493)

weiwei chen via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 8 08:06:50 PDT 2025


https://github.com/weiweichen updated https://github.com/llvm/llvm-project/pull/162493

>From 56f9ded2a32e8f8ef2c3492f7260ab2aa79eccaf Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Wed, 8 Oct 2025 10:35:36 -0400
Subject: [PATCH 1/3] Make sort ordering strictly weak.

---
 llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp b/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
index fedb694bfcc2a..caaa92999fd1a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
@@ -490,7 +490,9 @@ void AMDGPURewriteAGPRCopyMFMAImpl::eliminateSpillsOfReassignedVGPRs() const {
       return true;
 
     // Tie breaker by number to avoid need for stable sort
-    return A->reg().stackSlotIndex() < B->reg().stackSlotIndex();
+    // The ordering have to be strictly weak.
+    return (A->reg().stackSlotIndex() < B->reg().stackSlotIndex()) &&
+           ((A->weight() <= B->weight()) && (A->getSize() <= B->getSize()));
   });
 
   // FIXME: The APIs for dealing with the LiveInterval of a frame index are

>From a364ce67dba50b09eba5b8c480eef4166a3a654e Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Wed, 8 Oct 2025 11:03:18 -0400
Subject: [PATCH 2/3] Actually make it strict weak ordering.

---
 .../Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp    | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp b/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
index caaa92999fd1a..c0d31606c24ae 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
@@ -482,17 +482,17 @@ void AMDGPURewriteAGPRCopyMFMAImpl::eliminateSpillsOfReassignedVGPRs() const {
   }
 
   sort(StackIntervals, [](const LiveInterval *A, const LiveInterval *B) {
+    // The ordering have to be strictly weak.
+
     /// Sort heaviest intervals first to prioritize their unspilling
-    if (A->weight() > B->weight())
-      return true;
+    if (A->weight() != B->weight())
+      return A->weight() > B->weight();
 
-    if (A->getSize() > B->getSize())
-      return true;
+    if (A->getSize() != B->getSize())
+      return A->getSize() > B->getSize();
 
     // Tie breaker by number to avoid need for stable sort
-    // The ordering have to be strictly weak.
-    return (A->reg().stackSlotIndex() < B->reg().stackSlotIndex()) &&
-           ((A->weight() <= B->weight()) && (A->getSize() <= B->getSize()));
+    return (A->reg().stackSlotIndex() < B->reg().stackSlotIndex());
   });
 
   // FIXME: The APIs for dealing with the LiveInterval of a frame index are

>From e7e2598a1222aadb7d0836aed5b750d3f83f9aeb Mon Sep 17 00:00:00 2001
From: Weiwei Chen <weiwei.chen at modular.com>
Date: Wed, 8 Oct 2025 11:06:38 -0400
Subject: [PATCH 3/3] Remove empty line.

---
 llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp b/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
index c0d31606c24ae..b6db060119d0f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
@@ -483,7 +483,6 @@ void AMDGPURewriteAGPRCopyMFMAImpl::eliminateSpillsOfReassignedVGPRs() const {
 
   sort(StackIntervals, [](const LiveInterval *A, const LiveInterval *B) {
     // The ordering have to be strictly weak.
-
     /// Sort heaviest intervals first to prioritize their unspilling
     if (A->weight() != B->weight())
       return A->weight() > B->weight();



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