[llvm] [NVPTX] peroperly expand operations that we do not support on v2i32 (PR #162391)

[Artem Belevich via llvm-commits]

Artem-B wrote:

Context: most of the time nothing generates `<2 x i32>` operations, but we have some custom code generator that does. On the B200 GPU (sm_100) where v2i32 register class is enabled, LLVM fails to lower v2i32 ops in the generated IR and crashes.




https://github.com/llvm/llvm-project/pull/162391