[llvm] [llvm-exegesis] [AArch64] Add support for Load Instructions in subprocess execution mode (PR #144895)
Lakshay Kumar via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 7 12:10:50 PDT 2025
lakshayk-nv wrote:
Yes, Definitely would want support with reliable measurements and correct memory management. But i am stuck here ioctl and mmap requires the fd which are supposed to be at specific offset to auxiliary memory starting address as mentioned in penultimate comment.
Thus, Can you please shed some light on usage of `VAddressSpaceCeiling - 2 * pagesize` for ioctl syscall in x86 implementation by you(@boomanaiden154). Similarly, for fd for aux mmap and specific memory address. And, can we expect that logic/pathway arch independent?
> // llvm/tools/llvm-exegesis/lib/Assembler.cpp:105
> // └─llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp:482
> ioctl(
> fd = [getAuxiliaryMemoryStartAddress()] = [VAddressSpaceCeiling - 2 * pagesize],
> Request = PERF_EVENT_IOC_RESET,
> arg = PERF_IOC_FLAG_GROUP
> )
> // llvm/tools/llvm-exegesis/lib/Assembler.cpp:
> const MemoryValue &MemVal = Key.MemoryValues.at(MM.MemoryValueName);
> BBF.addInstructions(ET.generateMmap(
> MM.Address, MemVal.SizeBytes,
> ET.getAuxiliaryMemoryStartAddress() +
> sizeof(int) *
> (MemVal.Index + SubprocessMemory::AuxiliaryMemoryOffset)));
>>
PS: I had a bit hunch on this problem coming from using stack to save return value of aux mmap for loading first GPR register with memory address hacky. Thus,saved same in temp register to be loaded for req. register, which also have same measurement mismatch in subprocess and inprocess and LD1B for different `--min-instructions` value giving different which it should ideally.
https://github.com/llvm/llvm-project/pull/144895
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