[llvm] [AArch64][llvm] Reject assembler for invalid TLBIP instructions (PR #162090)

[via llvm-commits]

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@@ -830,131 +851,151 @@ class TLBIEntry<string name, bits<3> op1, bits<4> crn, bits<4> crm,
   code RequiresStr = [{ { }] # !interleave(Requires # ExtraRequires, [{, }]) # [{ } }];
 }
 
+def TLBIPTable : GenericTable {
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Lukacma wrote:

I think the bestwat would be to wrap both the table and lookup into a multiclass and define 2 instances of it called TLBI and TLBIP. The multiclass could then be defined like this:


```
multiclass <name> {
def  NAME#Table : GenericTable {
  let FilterClass = NAME#"Entry");
  let CppTypeName = t_type;
  let Fields = ["Name", "Encoding", "NeedsReg", "RequiresStr"];

  let PrimaryKey = ["Encoding"];
  let PrimaryKeyName = "lookup"# NAME# "ByEncoding";
}
def lookup....
....
}
}

```

or we could go a step further and encapsulate entry, table and lookup in a foreach statement. I don't have strong preference regarding that.

https://github.com/llvm/llvm-project/pull/162090