[llvm] AMDGPU: Use RegClassByHwMode to manage operand VGPR operand constraints (PR #158272)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 6 17:46:27 PDT 2025

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arsenm wrote:

ping. I'm submitting this today before vacation if there's no comments 

https://github.com/llvm/llvm-project/pull/158272

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