[llvm] [AMDGPU] Use true16 loads with +real-true16 and sram-ecc (PR #161256)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -1262,7 +1270,7 @@ define void @test_med3_f16(ptr addrspace(1) %arg, half %x, half %y, half %z) #0
 ; GISEL-GFX1250-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
 ; GISEL-GFX1250-TRUE16-NEXT:    s_wait_kmcnt 0x0
 ; GISEL-GFX1250-TRUE16-NEXT:    v_med3_num_f16 v2.l, v2.l, v3.l, v4.l
-; GISEL-GFX1250-TRUE16-NEXT:    flat_store_b16 v[0:1], v2
+; GISEL-GFX1250-TRUE16-NEXT:    global_store_b16 v[0:1], v2, off
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rampitec wrote:

Not just expected but desired. It is fixed by this patch. When t16 patterns were added stores were also put under that D16 preserving bit condition for no reason.

https://github.com/llvm/llvm-project/pull/161256