[llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 6 07:07:20 PDT 2025
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
``````````
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h b/llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
index 067120dd4..8a8ae3a3e 100644
--- a/llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
+++ b/llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
@@ -45,12 +45,12 @@ class MachineIDFSSAUpdater {
public:
MachineIDFSSAUpdater(MachineDominatorTree &DT, MachineFunction &MF,
- const MachineRegisterInfo::VRegAttrs &RegAttr)
+ const MachineRegisterInfo::VRegAttrs &RegAttr)
: DT(DT), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
RegAttrs(RegAttr) {}
MachineIDFSSAUpdater(MachineDominatorTree &DT, MachineFunction &MF,
- Register Reg)
+ Register Reg)
: MachineIDFSSAUpdater(DT, MF, MF.getRegInfo().getVRegAttrs(Reg)) {}
/// Indicate that a rewritten value is available in the specified block
diff --git a/llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp b/llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
index ffe78e11a..0eefdf373 100644
--- a/llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
+++ b/llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
@@ -84,7 +84,7 @@ computeLiveInBlocks(const SmallPtrSetImpl<MachineBasicBlock *> &UsingBlocks,
MachineInstrBuilder
MachineIDFSSAUpdater::createInst(unsigned Opc, MachineBasicBlock *BB,
- MachineBasicBlock::iterator I) {
+ MachineBasicBlock::iterator I) {
return BuildMI(*BB, I, DebugLoc(), TII.get(Opc),
MRI.createVirtualRegister(RegAttrs));
}
@@ -92,7 +92,7 @@ MachineIDFSSAUpdater::createInst(unsigned Opc, MachineBasicBlock *BB,
// IsLiveOut indicates whether we are computing live-out values (true) or
// live-in values (false).
Register MachineIDFSSAUpdater::computeValue(MachineBasicBlock *BB,
- bool IsLiveOut) {
+ bool IsLiveOut) {
BBValueInfo *BBInfo = &BBInfos[BB];
if (IsLiveOut && BBInfo->LiveOutValue)
diff --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
index c01f8f1f7..aae1334a0 100644
--- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
@@ -23,8 +23,8 @@
#include "SILowerI1Copies.h"
#include "AMDGPU.h"
-#include "llvm/CodeGen/MachineSSAUpdater.h"
#include "llvm/CodeGen/MachineIDFSSAUpdater.h"
+#include "llvm/CodeGen/MachineSSAUpdater.h"
#include "llvm/InitializePasses.h"
#define DEBUG_TYPE "si-i1-copies"
``````````
</details>
https://github.com/llvm/llvm-project/pull/145722
More information about the llvm-commits
mailing list