[llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)

[Diana Picus via llvm-commits]

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@@ -248,6 +254,95 @@ bool GCNPreRAOptimizationsImpl::run(MachineFunction &MF) {
 
   bool Changed = false;
 
+  // Single pass implementation
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rovka wrote:

```suggestion
```
Single pass implementation of what? This comment isn't really helping :) If you want to have a comment here, it should describe why we need to process MFMA instructions.

https://github.com/llvm/llvm-project/pull/156943