[llvm] f3703f3 - [TableGen] Look up registers directly in the CodeGenRegBank in CompressInstEmitter, rather than indirecting via the name. (#161853)

[via llvm-commits]

Author: Owen Anderson
Date: 2025-10-04T22:45:13+09:00
New Revision: f3703f36ee5cf09b0fe86a25270d5923deb43788

URL: https://github.com/llvm/llvm-project/commit/f3703f36ee5cf09b0fe86a25270d5923deb43788
DIFF: https://github.com/llvm/llvm-project/commit/f3703f36ee5cf09b0fe86a25270d5923deb43788.diff

LOG: [TableGen] Look up registers directly in the CodeGenRegBank in CompressInstEmitter, rather than indirecting via the name. (#161853)

The previous code was subtly incorrect, as it indexed the RegistersByName map using the tblgen Def name of the register, rather than the AsmName with which the table was initialized. But all of this indirection via the name was unnecessary.

Added: 
    

Modified: 
    llvm/utils/TableGen/CompressInstEmitter.cpp

Removed: 
    


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diff  --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index ccf83859924bc..d8c5ca7c1e1a3 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -167,7 +167,7 @@ bool CompressInstEmitter::validateRegister(const Record *Reg,
   assert(RegClass->isSubClassOf("RegisterClass") &&
          "RegClass record should be a RegisterClass");
   const CodeGenRegisterClass &RC = Target.getRegisterClass(RegClass);
-  const CodeGenRegister *R = Target.getRegisterByName(Reg->getName().lower());
+  const CodeGenRegister *R = Target.getRegBank().getReg(Reg);
   assert(R != nullptr && "Register not defined!!");
   return RC.contains(R);
 }