[llvm] 272025e - [RISCV] Remove unneeded anyext/trunc patterns from RISCVGISel.td. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 3 12:22:09 PDT 2025
Author: Craig Topper
Date: 2025-10-03T12:17:21-07:00
New Revision: 272025e5afa858ebc6e49df88958b34a9b186f54
URL: https://github.com/llvm/llvm-project/commit/272025e5afa858ebc6e49df88958b34a9b186f54
DIFF: https://github.com/llvm/llvm-project/commit/272025e5afa858ebc6e49df88958b34a9b186f54.diff
LOG: [RISCV] Remove unneeded anyext/trunc patterns from RISCVGISel.td. NFC
We have code to manually select these as copies already. There are
multiple combinations of types that need to be supported due to
s32 and s16 being legal for the GPR register bank. It's simpler
to handle generically than to write out all the patterns.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVGISel.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVGISel.td b/llvm/lib/Target/RISCV/RISCVGISel.td
index b444c65361429..9e833b762bd42 100644
--- a/llvm/lib/Target/RISCV/RISCVGISel.td
+++ b/llvm/lib/Target/RISCV/RISCVGISel.td
@@ -138,9 +138,7 @@ def : LdPat<extloadi16, LH, i32>;
def : StPat<truncstorei8, SB, GPR, i32>;
def : StPat<truncstorei16, SH, GPR, i32>;
-def : Pat<(anyext (i32 GPR:$src)), (COPY GPR:$src)>;
def : Pat<(sext (i32 GPR:$src)), (ADDIW GPR:$src, 0)>;
-def : Pat<(i32 (trunc GPR:$src)), (COPY GPR:$src)>;
def : Pat<(sext_inreg (i64 (add GPR:$rs1, simm12_lo:$imm)), i32),
(ADDIW GPR:$rs1, simm12_lo:$imm)>;
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