[llvm] [NFC][TableGen] Fix namespace usage in various files (PR #161839)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 3 05:53:07 PDT 2025
https://github.com/jurahul created https://github.com/llvm/llvm-project/pull/161839
None
>From 7ec712d1841f2b7a435bdd9e5c72593a844da648 Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Fri, 3 Oct 2025 05:41:57 -0700
Subject: [PATCH] [NFC][TableGen] Fix namespace usage in various files
---
.../Support/X86DisassemblerDecoderCommon.h | 6 +-
llvm/lib/TableGen/Error.cpp | 58 +++++++++----------
llvm/lib/TableGen/Main.cpp | 4 +-
llvm/lib/TableGen/Record.cpp | 6 +-
llvm/lib/TableGen/TGParser.cpp | 6 +-
.../TableGen/Common/CodeGenDAGPatterns.cpp | 6 +-
.../TableGen/Common/CodeGenRegisters.cpp | 11 ----
llvm/utils/TableGen/Common/InfoByHwMode.cpp | 8 +--
.../TableGen/Common/PredicateExpander.cpp | 4 +-
llvm/utils/TableGen/DXILEmitter.cpp | 18 +++---
llvm/utils/TableGen/DecoderEmitter.cpp | 4 --
llvm/utils/TableGen/ExegesisEmitter.cpp | 18 +++---
llvm/utils/TableGen/FastISelEmitter.cpp | 6 --
llvm/utils/TableGen/X86DisassemblerShared.h | 4 ++
llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 18 +++---
.../utils/TableGen/X86InstrMappingEmitter.cpp | 4 +-
llvm/utils/TableGen/X86MnemonicTables.cpp | 3 +-
llvm/utils/TableGen/X86ModRMFilters.h | 8 +--
llvm/utils/TableGen/X86RecognizableInstr.h | 4 +-
19 files changed, 82 insertions(+), 114 deletions(-)
diff --git a/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h b/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
index 1e07fbe64f7d3..faaff4ad8ee02 100644
--- a/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
+++ b/llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
@@ -18,8 +18,7 @@
#include "llvm/Support/DataTypes.h"
-namespace llvm {
-namespace X86Disassembler {
+namespace llvm::X86Disassembler {
#define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers
#define CONTEXTS_SYM x86DisassemblerContexts
@@ -541,7 +540,6 @@ static const unsigned X86_MAX_OPERANDS = 6;
/// respectively.
enum DisassemblerMode { MODE_16BIT, MODE_32BIT, MODE_64BIT };
-} // namespace X86Disassembler
-} // namespace llvm
+} // namespace llvm::X86Disassembler
#endif
diff --git a/llvm/lib/TableGen/Error.cpp b/llvm/lib/TableGen/Error.cpp
index de0c4c971efeb..3ba2c6c6dddb2 100644
--- a/llvm/lib/TableGen/Error.cpp
+++ b/llvm/lib/TableGen/Error.cpp
@@ -19,10 +19,10 @@
#include "llvm/TableGen/Record.h"
#include <cstdlib>
-namespace llvm {
+using namespace llvm;
-SourceMgr SrcMgr;
-unsigned ErrorsPrinted = 0;
+SourceMgr llvm::SrcMgr;
+unsigned llvm::ErrorsPrinted = 0;
static void PrintMessage(ArrayRef<SMLoc> Locs, SourceMgr::DiagKind Kind,
const Twine &Msg) {
@@ -49,118 +49,118 @@ static void PrintMessage(ArrayRef<SMLoc> Locs, SourceMgr::DiagKind Kind,
// Functions to print notes.
-void PrintNote(const Twine &Msg) {
- WithColor::note() << Msg << "\n";
-}
+void llvm::PrintNote(const Twine &Msg) { WithColor::note() << Msg << "\n"; }
-void PrintNote(function_ref<void(raw_ostream &OS)> PrintMsg) {
+void llvm::PrintNote(function_ref<void(raw_ostream &OS)> PrintMsg) {
PrintMsg(WithColor::note());
}
-void PrintNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
+void llvm::PrintNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
PrintMessage(NoteLoc, SourceMgr::DK_Note, Msg);
}
// Functions to print fatal notes.
-void PrintFatalNote(const Twine &Msg) {
+void llvm::PrintFatalNote(const Twine &Msg) {
PrintNote(Msg);
fatal_exit();
}
-void PrintFatalNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
+void llvm::PrintFatalNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
PrintNote(NoteLoc, Msg);
fatal_exit();
}
// This method takes a Record and uses the source location
// stored in it.
-void PrintFatalNote(const Record *Rec, const Twine &Msg) {
+void llvm::PrintFatalNote(const Record *Rec, const Twine &Msg) {
PrintNote(Rec->getLoc(), Msg);
fatal_exit();
}
// This method takes a RecordVal and uses the source location
// stored in it.
-void PrintFatalNote(const RecordVal *RecVal, const Twine &Msg) {
+void llvm::PrintFatalNote(const RecordVal *RecVal, const Twine &Msg) {
PrintNote(RecVal->getLoc(), Msg);
fatal_exit();
}
// Functions to print warnings.
-void PrintWarning(const Twine &Msg) { WithColor::warning() << Msg << "\n"; }
+void llvm::PrintWarning(const Twine &Msg) {
+ WithColor::warning() << Msg << "\n";
+}
-void PrintWarning(ArrayRef<SMLoc> WarningLoc, const Twine &Msg) {
+void llvm::PrintWarning(ArrayRef<SMLoc> WarningLoc, const Twine &Msg) {
PrintMessage(WarningLoc, SourceMgr::DK_Warning, Msg);
}
-void PrintWarning(const char *Loc, const Twine &Msg) {
+void llvm::PrintWarning(const char *Loc, const Twine &Msg) {
SrcMgr.PrintMessage(SMLoc::getFromPointer(Loc), SourceMgr::DK_Warning, Msg);
}
// Functions to print errors.
-void PrintError(const Twine &Msg) { WithColor::error() << Msg << "\n"; }
+void llvm::PrintError(const Twine &Msg) { WithColor::error() << Msg << "\n"; }
-void PrintError(function_ref<void(raw_ostream &OS)> PrintMsg) {
+void llvm::PrintError(function_ref<void(raw_ostream &OS)> PrintMsg) {
PrintMsg(WithColor::error());
}
-void PrintError(ArrayRef<SMLoc> ErrorLoc, const Twine &Msg) {
+void llvm::PrintError(ArrayRef<SMLoc> ErrorLoc, const Twine &Msg) {
PrintMessage(ErrorLoc, SourceMgr::DK_Error, Msg);
}
-void PrintError(const char *Loc, const Twine &Msg) {
+void llvm::PrintError(const char *Loc, const Twine &Msg) {
SrcMgr.PrintMessage(SMLoc::getFromPointer(Loc), SourceMgr::DK_Error, Msg);
}
// This method takes a Record and uses the source location
// stored in it.
-void PrintError(const Record *Rec, const Twine &Msg) {
+void llvm::PrintError(const Record *Rec, const Twine &Msg) {
PrintMessage(Rec->getLoc(), SourceMgr::DK_Error, Msg);
}
// This method takes a RecordVal and uses the source location
// stored in it.
-void PrintError(const RecordVal *RecVal, const Twine &Msg) {
+void llvm::PrintError(const RecordVal *RecVal, const Twine &Msg) {
PrintMessage(RecVal->getLoc(), SourceMgr::DK_Error, Msg);
}
// Functions to print fatal errors.
-void PrintFatalError(const Twine &Msg) {
+void llvm::PrintFatalError(const Twine &Msg) {
PrintError(Msg);
fatal_exit();
}
-void PrintFatalError(function_ref<void(raw_ostream &OS)> PrintMsg) {
+void llvm::PrintFatalError(function_ref<void(raw_ostream &OS)> PrintMsg) {
PrintError(PrintMsg);
fatal_exit();
}
-void PrintFatalError(ArrayRef<SMLoc> ErrorLoc, const Twine &Msg) {
+void llvm::PrintFatalError(ArrayRef<SMLoc> ErrorLoc, const Twine &Msg) {
PrintError(ErrorLoc, Msg);
fatal_exit();
}
// This method takes a Record and uses the source location
// stored in it.
-void PrintFatalError(const Record *Rec, const Twine &Msg) {
+void llvm::PrintFatalError(const Record *Rec, const Twine &Msg) {
PrintError(Rec->getLoc(), Msg);
fatal_exit();
}
// This method takes a RecordVal and uses the source location
// stored in it.
-void PrintFatalError(const RecordVal *RecVal, const Twine &Msg) {
+void llvm::PrintFatalError(const RecordVal *RecVal, const Twine &Msg) {
PrintError(RecVal->getLoc(), Msg);
fatal_exit();
}
// Check an assertion: Obtain the condition value and be sure it is true.
// If not, print a nonfatal error along with the message.
-bool CheckAssert(SMLoc Loc, const Init *Condition, const Init *Message) {
+bool llvm::CheckAssert(SMLoc Loc, const Init *Condition, const Init *Message) {
auto *CondValue = dyn_cast_or_null<IntInit>(Condition->convertInitializerTo(
IntRecTy::get(Condition->getRecordKeeper())));
if (!CondValue) {
@@ -178,11 +178,9 @@ bool CheckAssert(SMLoc Loc, const Init *Condition, const Init *Message) {
}
// Dump a message to stderr.
-void dumpMessage(SMLoc Loc, const Init *Message) {
+void llvm::dumpMessage(SMLoc Loc, const Init *Message) {
if (auto *MessageInit = dyn_cast<StringInit>(Message))
PrintNote(Loc, MessageInit->getValue());
else
PrintError(Loc, "dump value is not of type string");
}
-
-} // end namespace llvm
diff --git a/llvm/lib/TableGen/Main.cpp b/llvm/lib/TableGen/Main.cpp
index f545706d6fe30..42043f70768c5 100644
--- a/llvm/lib/TableGen/Main.cpp
+++ b/llvm/lib/TableGen/Main.cpp
@@ -64,14 +64,12 @@ WriteIfChanged("write-if-changed", cl::desc("Only write output if it changed"));
static cl::opt<bool>
TimePhases("time-phases", cl::desc("Time phases of parser and backend"));
-namespace llvm {
-cl::opt<bool> EmitLongStrLiterals(
+cl::opt<bool> llvm::EmitLongStrLiterals(
"long-string-literals",
cl::desc("when emitting large string tables, prefer string literals over "
"comma-separated char literals. This can be a readability and "
"compile-time performance win, but upsets some compilers"),
cl::Hidden, cl::init(true));
-} // end namespace llvm
static cl::opt<bool> NoWarnOnUnusedTemplateArgs(
"no-warn-on-unused-template-args",
diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index 051a896cfd1b4..2ea3a24bb8eb2 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -46,8 +46,7 @@ using namespace llvm;
// Context
//===----------------------------------------------------------------------===//
-namespace llvm {
-namespace detail {
+namespace llvm::detail {
/// This class represents the internal implementation of the RecordKeeper.
/// It contains all of the contextual static state of the Record classes. It is
/// kept out-of-line to simplify dependencies, and also make it easier for
@@ -100,8 +99,7 @@ struct RecordKeeperImpl {
void dumpAllocationStats(raw_ostream &OS) const;
};
-} // namespace detail
-} // namespace llvm
+} // namespace llvm::detail
void detail::RecordKeeperImpl::dumpAllocationStats(raw_ostream &OS) const {
// Dump memory allocation related stats.
diff --git a/llvm/lib/TableGen/TGParser.cpp b/llvm/lib/TableGen/TGParser.cpp
index f928ded16186f..3d31d8e2717b1 100644
--- a/llvm/lib/TableGen/TGParser.cpp
+++ b/llvm/lib/TableGen/TGParser.cpp
@@ -31,8 +31,6 @@ using namespace llvm;
// Support Code for the Semantic Actions.
//===----------------------------------------------------------------------===//
-namespace llvm {
-
RecordsEntry::RecordsEntry(std::unique_ptr<Record> Rec) : Rec(std::move(Rec)) {}
RecordsEntry::RecordsEntry(std::unique_ptr<ForeachLoop> Loop)
: Loop(std::move(Loop)) {}
@@ -41,6 +39,7 @@ RecordsEntry::RecordsEntry(std::unique_ptr<Record::AssertionInfo> Assertion)
RecordsEntry::RecordsEntry(std::unique_ptr<Record::DumpInfo> Dump)
: Dump(std::move(Dump)) {}
+namespace llvm {
struct SubClassReference {
SMRange RefRange;
const Record *Rec = nullptr;
@@ -61,6 +60,7 @@ struct SubMultiClassReference {
bool isInvalid() const { return MC == nullptr; }
void dump() const;
};
+} // end namespace llvm
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void SubMultiClassReference::dump() const {
@@ -74,8 +74,6 @@ LLVM_DUMP_METHOD void SubMultiClassReference::dump() const {
}
#endif
-} // end namespace llvm
-
static bool checkBitsConcrete(Record &R, const RecordVal &RV) {
const auto *BV = cast<BitsInit>(RV.getValue());
for (unsigned i = 0, e = BV->getNumBits(); i != e; ++i) {
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
index 75bea77faba42..8076ce2486f56 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
@@ -246,16 +246,14 @@ bool TypeSetByHwMode::operator==(const TypeSetByHwMode &VTS) const {
return true;
}
-namespace llvm {
-raw_ostream &operator<<(raw_ostream &OS, const MachineValueTypeSet &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineValueTypeSet &T) {
T.writeToStream(OS);
return OS;
}
-raw_ostream &operator<<(raw_ostream &OS, const TypeSetByHwMode &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const TypeSetByHwMode &T) {
T.writeToStream(OS);
return OS;
}
-} // namespace llvm
LLVM_DUMP_METHOD
void TypeSetByHwMode::dump() const { dbgs() << *this << '\n'; }
diff --git a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
index e873b3eaa4b7e..bedcf6d2a126a 100644
--- a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
@@ -849,17 +849,6 @@ unsigned CodeGenRegisterClass::getWeight(const CodeGenRegBank &RegBank) const {
return (*Members.begin())->getWeight(RegBank);
}
-namespace llvm {
-
-raw_ostream &operator<<(raw_ostream &OS, const CodeGenRegisterClass::Key &K) {
- OS << "{ " << K.RSI;
- for (const auto R : *K.Members)
- OS << ", " << R->getName();
- return OS << " }";
-}
-
-} // end namespace llvm
-
// This is a simple lexicographical order that can be used to search for sets.
// It is not the same as the topological order provided by TopoOrderRC.
bool CodeGenRegisterClass::Key::operator<(
diff --git a/llvm/utils/TableGen/Common/InfoByHwMode.cpp b/llvm/utils/TableGen/Common/InfoByHwMode.cpp
index a6e2fc415f350..4c8197dc60c14 100644
--- a/llvm/utils/TableGen/Common/InfoByHwMode.cpp
+++ b/llvm/utils/TableGen/Common/InfoByHwMode.cpp
@@ -227,19 +227,17 @@ EncodingInfoByHwMode::EncodingInfoByHwMode(const Record *R,
}
}
-namespace llvm {
-raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
T.writeToStream(OS);
return OS;
}
-raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const RegSizeInfo &T) {
T.writeToStream(OS);
return OS;
}
-raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
+raw_ostream &llvm::operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
T.writeToStream(OS);
return OS;
}
-} // namespace llvm
diff --git a/llvm/utils/TableGen/Common/PredicateExpander.cpp b/llvm/utils/TableGen/Common/PredicateExpander.cpp
index 09d953801600d..03252ed465b75 100644
--- a/llvm/utils/TableGen/Common/PredicateExpander.cpp
+++ b/llvm/utils/TableGen/Common/PredicateExpander.cpp
@@ -14,7 +14,7 @@
#include "CodeGenSchedule.h" // Definition of STIPredicateFunction.
#include "llvm/TableGen/Record.h"
-namespace llvm {
+using namespace llvm;
void PredicateExpander::expandTrue(raw_ostream &OS) { OS << "true"; }
void PredicateExpander::expandFalse(raw_ostream &OS) { OS << "false"; }
@@ -553,5 +553,3 @@ void STIPredicateExpander::expandSTIPredicate(raw_ostream &OS,
expandEpilogue(OS, Fn);
}
}
-
-} // namespace llvm
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 09ce9f3027410..29958e82a843b 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -37,15 +37,6 @@ struct DXILIntrinsicSelect {
SmallVector<const Record *> ArgSelectRecords;
};
-static StringRef StripIntrinArgSelectTypePrefix(StringRef Type) {
- StringRef Prefix = "IntrinArgSelect_";
- if (!Type.starts_with(Prefix)) {
- PrintFatalError("IntrinArgSelectType definintion must be prefixed with "
- "'IntrinArgSelect_'");
- }
- return Type.substr(Prefix.size());
-}
-
struct DXILOperationDesc {
std::string OpName; // name of DXIL operation
int OpCode; // ID of DXIL operation
@@ -66,6 +57,15 @@ struct DXILOperationDesc {
};
} // end anonymous namespace
+static StringRef StripIntrinArgSelectTypePrefix(StringRef Type) {
+ StringRef Prefix = "IntrinArgSelect_";
+ if (!Type.starts_with(Prefix)) {
+ PrintFatalError("IntrinArgSelectType definintion must be prefixed with "
+ "'IntrinArgSelect_'");
+ }
+ return Type.substr(Prefix.size());
+}
+
/// In-place sort TableGen records of class with a field
/// Version dxil_version
/// in the ascending version order.
diff --git a/llvm/utils/TableGen/DecoderEmitter.cpp b/llvm/utils/TableGen/DecoderEmitter.cpp
index 961dc2815f6b9..5d41b7dc3c311 100644
--- a/llvm/utils/TableGen/DecoderEmitter.cpp
+++ b/llvm/utils/TableGen/DecoderEmitter.cpp
@@ -194,10 +194,6 @@ class DecoderEmitter {
void parseInstructionEncodings();
};
-} // end anonymous namespace
-
-namespace {
-
struct EncodingIsland {
unsigned StartBit;
unsigned NumBits;
diff --git a/llvm/utils/TableGen/ExegesisEmitter.cpp b/llvm/utils/TableGen/ExegesisEmitter.cpp
index 1b4b0729a5fcc..d4e0119f472a8 100644
--- a/llvm/utils/TableGen/ExegesisEmitter.cpp
+++ b/llvm/utils/TableGen/ExegesisEmitter.cpp
@@ -58,6 +58,14 @@ class ExegesisEmitter {
const std::map<llvm::StringRef, unsigned> PfmCounterNameTable;
};
+struct ValidationCounterInfo {
+ int64_t EventNumber;
+ StringRef EventName;
+ unsigned PfmCounterID;
+};
+
+} // namespace
+
static std::map<llvm::StringRef, unsigned>
collectPfmCounters(const RecordKeeper &Records) {
std::map<llvm::StringRef, unsigned> PfmCounterNameTable;
@@ -106,12 +114,6 @@ ExegesisEmitter::ExegesisEmitter(const RecordKeeper &RK)
Target = Targets[0]->getName().str();
}
-struct ValidationCounterInfo {
- int64_t EventNumber;
- StringRef EventName;
- unsigned PfmCounterID;
-};
-
bool EventNumberLess(const ValidationCounterInfo &LHS,
const ValidationCounterInfo &RHS) {
return LHS.EventNumber < RHS.EventNumber;
@@ -221,7 +223,7 @@ void ExegesisEmitter::emitPfmCounters(raw_ostream &OS) const {
emitPfmCountersInfo(*Def, IssueCountersTableOffset, OS);
OS << "\n";
-} // namespace
+}
void ExegesisEmitter::emitPfmCountersLookupTable(raw_ostream &OS) const {
std::vector<const Record *> Bindings =
@@ -249,7 +251,5 @@ void ExegesisEmitter::run(raw_ostream &OS) const {
emitPfmCountersLookupTable(OS);
}
-} // end anonymous namespace
-
static TableGen::Emitter::OptClass<ExegesisEmitter>
X("gen-exegesis", "Generate llvm-exegesis tables");
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index 694d89a5ada3c..dba8bde54ff4d 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -52,11 +52,9 @@ struct InstructionMemo {
InstructionMemo(const InstructionMemo &Other) = delete;
InstructionMemo(InstructionMemo &&Other) = default;
};
-} // End anonymous namespace
/// ImmPredicateSet - This uniques predicates (represented as a string) and
/// gives them unique (small) integer ID's that start at 0.
-namespace {
class ImmPredicateSet {
DenseMap<TreePattern *, unsigned> ImmIDs;
std::vector<TreePredicateFn> PredsByName;
@@ -77,12 +75,10 @@ class ImmPredicateSet {
iterator begin() const { return PredsByName.begin(); }
iterator end() const { return PredsByName.end(); }
};
-} // End anonymous namespace
/// OperandsSignature - This class holds a description of a list of operand
/// types. It has utility methods for emitting text based on the operands.
///
-namespace {
struct OperandsSignature {
class OpKind {
enum { OK_Reg, OK_FP, OK_Imm, OK_Invalid = -1 };
@@ -366,9 +362,7 @@ struct OperandsSignature {
Opnd.printManglingSuffix(OS, ImmPredicates, StripImmCodes);
}
};
-} // End anonymous namespace
-namespace {
class FastISelMap {
// A multimap is needed instead of a "plain" map because the key is
// the instruction's complexity (an int) and they are not unique.
diff --git a/llvm/utils/TableGen/X86DisassemblerShared.h b/llvm/utils/TableGen/X86DisassemblerShared.h
index f60fd477788a5..d5f936dabab6a 100644
--- a/llvm/utils/TableGen/X86DisassemblerShared.h
+++ b/llvm/utils/TableGen/X86DisassemblerShared.h
@@ -14,6 +14,8 @@
#include "llvm/Support/X86DisassemblerDecoderCommon.h"
+namespace llvm::X86Disassembler {
+
struct InstructionSpecifier {
llvm::X86Disassembler::OperandSpecifier
operands[llvm::X86Disassembler::X86_MAX_OPERANDS];
@@ -52,4 +54,6 @@ struct ContextDecision {
ContextDecision() { memset(opcodeDecisions, 0, sizeof(opcodeDecisions)); }
};
+} // namespace llvm::X86Disassembler
+
#endif
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
index 1e1e4ab650030..6f523b5a197d3 100644
--- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -30,22 +30,23 @@ struct ManualMapEntry {
const char *MemInstStr;
uint16_t Strategy;
};
+} // namespace
// List of instructions requiring explicitly aligned memory.
-const char *ExplicitAlign[] = {"MOVDQA", "MOVAPS", "MOVAPD", "MOVNTPS",
- "MOVNTPD", "MOVNTDQ", "MOVNTDQA"};
+static constexpr const char *ExplicitAlign[] = {
+ "MOVDQA", "MOVAPS", "MOVAPD", "MOVNTPS", "MOVNTPD", "MOVNTDQ", "MOVNTDQA"};
// List of instructions NOT requiring explicit memory alignment.
-const char *ExplicitUnalign[] = {"MOVDQU", "MOVUPS", "MOVUPD",
- "PCMPESTRM", "PCMPESTRI", "PCMPISTRM",
- "PCMPISTRI"};
+static constexpr const char *ExplicitUnalign[] = {
+ "MOVDQU", "MOVUPS", "MOVUPD", "PCMPESTRM",
+ "PCMPESTRI", "PCMPISTRM", "PCMPISTRI"};
-const ManualMapEntry ManualMapSet[] = {
+static const ManualMapEntry ManualMapSet[] = {
#define ENTRY(REG, MEM, FLAGS) {#REG, #MEM, FLAGS},
#include "X86ManualFoldTables.def"
};
-const std::set<StringRef> NoFoldSet = {
+static const std::set<StringRef> NoFoldSet = {
#define NOFOLD(INSN) #INSN,
#include "X86ManualFoldTables.def"
};
@@ -62,6 +63,7 @@ static bool isExplicitUnalign(const CodeGenInstruction *Inst) {
});
}
+namespace {
class X86FoldTablesEmitter {
const RecordKeeper &Records;
const CodeGenTarget Target;
@@ -230,6 +232,7 @@ class X86FoldTablesEmitter {
OS << "};\n\n";
}
};
+} // namespace
// Return true if one of the instruction's operands is a RST register class
static bool hasRSTRegClass(const CodeGenInstruction *Inst) {
@@ -318,6 +321,7 @@ static bool isNOREXRegClass(const Record *Op) {
// Function object - Operator() returns true if the given Reg instruction
// matches the Mem instruction of this object.
+namespace {
class IsMatch {
const CodeGenInstruction *MemInst;
const X86Disassembler::RecognizableInstrBase MemRI;
diff --git a/llvm/utils/TableGen/X86InstrMappingEmitter.cpp b/llvm/utils/TableGen/X86InstrMappingEmitter.cpp
index be5e2a73e8d43..2745ba72ba624 100644
--- a/llvm/utils/TableGen/X86InstrMappingEmitter.cpp
+++ b/llvm/utils/TableGen/X86InstrMappingEmitter.cpp
@@ -66,6 +66,7 @@ class X86InstrMappingEmitter {
void printTable(ArrayRef<Entry> Table, StringRef Name, StringRef Macro,
raw_ostream &OS);
};
+} // namespace
void X86InstrMappingEmitter::printClassDef(raw_ostream &OS) {
OS << "struct X86TableEntry {\n"
@@ -106,6 +107,7 @@ void X86InstrMappingEmitter::printTable(ArrayRef<Entry> Table, StringRef Name,
printMacroEnd(Macro, OS);
}
+namespace {
class IsMatch {
const CodeGenInstruction *OldInst;
@@ -146,6 +148,7 @@ class IsMatch {
return true;
}
};
+} // namespace
static bool isInteresting(const Record *Rec) {
// _REV instruction should not appear before encoding optimization
@@ -368,7 +371,6 @@ void X86InstrMappingEmitter::run(raw_ostream &OS) {
emitND2NonNDTable(Insts, OS);
emitSSE2AVXTable(Insts, OS);
}
-} // namespace
static TableGen::Emitter::OptClass<X86InstrMappingEmitter>
X("gen-x86-instr-mapping", "Generate X86 instruction mapping");
diff --git a/llvm/utils/TableGen/X86MnemonicTables.cpp b/llvm/utils/TableGen/X86MnemonicTables.cpp
index 85bd4df0d4362..7851919bd7387 100644
--- a/llvm/utils/TableGen/X86MnemonicTables.cpp
+++ b/llvm/utils/TableGen/X86MnemonicTables.cpp
@@ -30,6 +30,7 @@ class X86MnemonicTablesEmitter {
// Output X86 mnemonic tables.
void run(raw_ostream &OS);
};
+} // namespace
void X86MnemonicTablesEmitter::run(raw_ostream &OS) {
emitSourceFileHeader("X86 Mnemonic tables", OS);
@@ -83,7 +84,5 @@ void X86MnemonicTablesEmitter::run(raw_ostream &OS) {
OS << "} // end namespace X86\n} // end namespace llvm";
}
-} // namespace
-
static TableGen::Emitter::OptClass<X86MnemonicTablesEmitter>
X("gen-x86-mnemonic-tables", "Generate X86 mnemonic tables");
diff --git a/llvm/utils/TableGen/X86ModRMFilters.h b/llvm/utils/TableGen/X86ModRMFilters.h
index b579f229379bb..7bf111ffa1d50 100644
--- a/llvm/utils/TableGen/X86ModRMFilters.h
+++ b/llvm/utils/TableGen/X86ModRMFilters.h
@@ -19,9 +19,7 @@
#include <cstdint>
-namespace llvm {
-
-namespace X86Disassembler {
+namespace llvm::X86Disassembler {
/// ModRMFilter - Abstract base class for clases that recognize patterns in
/// ModR/M bytes.
@@ -135,8 +133,6 @@ class ExactFilter : public ModRMFilter {
bool accepts(uint8_t modRM) const override { return (ModRM == modRM); }
};
-} // namespace X86Disassembler
-
-} // namespace llvm
+} // namespace llvm::X86Disassembler
#endif
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h
index b74e74dd3f6e7..52f95383b6fb4 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.h
+++ b/llvm/utils/TableGen/X86RecognizableInstr.h
@@ -22,8 +22,6 @@
#include <string>
#include <vector>
-struct InstructionSpecifier;
-
namespace llvm {
class Record;
#define X86_INSTR_MRM_MAPPING \
@@ -179,6 +177,8 @@ enum { ExplicitREX2 = 1, ExplicitEVEX = 3 };
namespace X86Disassembler {
class DisassemblerTables;
+struct InstructionSpecifier;
+
/// Extract common fields of a single X86 instruction from a CodeGenInstruction
struct RecognizableInstrBase {
/// The OpPrefix field from the record
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