[llvm] [X86][GISel] Add missing legalization for G_IMPLICIT_DEF (PR #161699)

[via llvm-commits]

https://github.com/bonsthie created https://github.com/llvm/llvm-project/pull/161699

Legalize scalar and vector integer types for `G_IMPLICIT_DEF` at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming `G_*_VECTOR` legalization, since vector inserts/builds rely on undef bases.

>From 81e18b2c8710c299e5d5fb3fc99d435a5d8006f0 Mon Sep 17 00:00:00 2001
From: bonsthie <barnabe.bonnet at gmail.com>
Date: Thu, 2 Oct 2025 16:25:50 +0200
Subject: [PATCH] [X86][GISel] Add missing legalization for G_IMPLICIT_DEF

Legalize scalar and vector integer types for G_IMPLICIT_DEF at SSE2/AVX2/AVX-512 widths.
This is groundwork for upcoming G_*_VECTOR legalization, since vector inserts/builds rely on undef bases.
---
 .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 22 ++++++++++++-
 .../GlobalISel/legalize-g_implicit_def.mir    | 32 +++++++++++++++++++
 2 files changed, 53 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir

diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 143c4c43e611a..d16dda91cc495 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -91,7 +91,27 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
   // s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
       .legalFor({p0, s1, s8, s16, s32, s64})
-      .legalFor(Is64Bit, {s128});
+      .legalFor(Is64Bit, {s128})
+      .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
+      .legalFor(HasAVX, {v8s32, v4s64})
+      .legalFor(HasAVX2, {v32s8, v16s16, v8s32, v4s64})
+      .legalFor(HasAVX512, {v16s32, v8s64})
+      .legalFor(HasBWI, {v64s8, v32s16})
+      .widenScalarOrEltToNextPow2(0, /*Min=*/8)
+      .clampScalarOrElt(0, s8, sMaxScalar)
+      .moreElementsToNextPow2(0)
+      .clampMinNumElements(0, s8, 16)
+      .clampMinNumElements(0, s16, 8)
+      .clampMinNumElements(0, s32, 4)
+      .clampMinNumElements(0, s64, 2)
+      .clampMaxNumElements(0, s8, HasBWI ? 64 : (HasAVX2 ? 32 : 16))
+      .clampMaxNumElements(0, s16, HasBWI ? 32 : (HasAVX2 ? 16 : 8))
+      .clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX2 ? 8 : 4))
+      .clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX2 ? 4 : 2))
+      .clampMaxNumElements(0, p0,
+                           Is64Bit ? s64MaxVector.getNumElements()
+                                   : s32MaxVector.getNumElements())
+      .scalarizeIf(scalarOrEltWiderThan(0, 64), 0);
 
   getActionDefinitionsBuilder(G_CONSTANT)
       .legalFor({p0, s8, s16, s32})
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir
new file mode 100644
index 0000000000000..b02832b9824ad
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir
@@ -0,0 +1,32 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,AVX2
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,SSE2
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,AVX512F 
+
+
+---
+name: test_basic_g_implicit_def_v8i64
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_basic_g_implicit_def_v8i64
+    ; AVX512F: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
+    ; AVX2: [[DEF_AVX2:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF
+    ; AVX2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_AVX2]](<4 x s64>), [[DEF_AVX2]](<4 x s64>)
+    ; SSE2: [[DEF_SSE2:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
+    ; SSE2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>)
+    %0:_(<8 x s64>) = G_IMPLICIT_DEF
+    RET 0, implicit %0
+...
+
+---
+name: test_g_implicit_def_cample_size
+body: |
+  bb.1:
+   ; CHECK-LABEL: name: test_g_implicit_def_cample_size
+   ; AVX512: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
+   ; AVX2: {{%[0-9]+}}:_(<4 x s64>) = G_IMPLICIT_DEF
+   ; SSE2: {{%[0-9]+}}:_(<2 x s64>) = G_IMPLICIT_DEF
+    %0:_(<5 x s63>) = G_IMPLICIT_DEF
+    RET 0, implicit %0
+...
+
+