[llvm] daa4e57 - [Hexagon] Add opcode V6_vS32Ub_npred_ai for offset validity check (#161618)
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Thu Oct 2 07:43:29 PDT 2025
Author: Ikhlas Ajbar
Date: 2025-10-02T09:43:24-05:00
New Revision: daa4e57ccf38ff6ac22243e98a035c87b9f9f3ae
URL: https://github.com/llvm/llvm-project/commit/daa4e57ccf38ff6ac22243e98a035c87b9f9f3ae
DIFF: https://github.com/llvm/llvm-project/commit/daa4e57ccf38ff6ac22243e98a035c87b9f9f3ae.diff
LOG: [Hexagon] Add opcode V6_vS32Ub_npred_ai for offset validity check (#161618)
Check for a valid offset for unaligned vector store V6_vS32Ub_npred_ai.
isValidOffset() is updated to evaluate offset of this instruction.
Fixes #160647
Added:
llvm/test/CodeGen/Hexagon/unaligned-vec-store.ll
Modified:
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 45d194e944fb9..939841ae817c3 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -2804,6 +2804,7 @@ bool HexagonInstrInfo::isValidOffset(unsigned Opcode, int Offset,
case Hexagon::V6_vL32b_nt_cur_npred_ai:
case Hexagon::V6_vL32b_nt_tmp_pred_ai:
case Hexagon::V6_vL32b_nt_tmp_npred_ai:
+ case Hexagon::V6_vS32Ub_npred_ai:
case Hexagon::V6_vgathermh_pseudo:
case Hexagon::V6_vgathermw_pseudo:
case Hexagon::V6_vgathermhw_pseudo:
diff --git a/llvm/test/CodeGen/Hexagon/unaligned-vec-store.ll b/llvm/test/CodeGen/Hexagon/unaligned-vec-store.ll
new file mode 100644
index 0000000000000..267e365243711
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/unaligned-vec-store.ll
@@ -0,0 +1,23 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128B < %s | FileCheck %s
+; REQUIRES: asserts
+
+; Check that the test does not assert when unaligned vector store V6_vS32Ub_npred_ai is generated.
+; CHECK: if (!p{{[0-3]}}) vmemu
+
+target triple = "hexagon-unknown-unknown-elf"
+
+define fastcc void @test(i1 %cmp.i.i) {
+entry:
+ %call.i.i.i172 = load ptr, ptr null, align 4
+ %add.ptr = getelementptr i8, ptr %call.i.i.i172, i32 1
+ store <32 x i32> zeroinitializer, ptr %add.ptr, align 128
+ %add.ptr4.i4 = getelementptr i8, ptr %call.i.i.i172, i32 129
+ br i1 %cmp.i.i, label %common.ret, label %if.end.i.i
+
+common.ret: ; preds = %if.end.i.i, %entry
+ ret void
+
+if.end.i.i: ; preds = %entry
+ store <32 x i32> zeroinitializer, ptr %add.ptr4.i4, align 1
+ br label %common.ret
+}
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